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<ZirconiumX> So, something I commonly see is people optimising their designs for a given LUT size. Are there any guides on that?
<whitequark> unfortunately not, and it is something of a dark art
<whitequark> for something like an ALU you can expect the synthesizer to do a perfect job if it understands the architecture well enough, but if you just have a bunch of control logic, it can be very tricky
<whitequark> changes that seem like a huge win lose you nothing (or gain a few LUTs), and seemingly no-op changes can slash a few % of total size
<whitequark> i think the current "state of the art" for highly space optimized CPUs boils down to manually laying out the datapath, and then writing a one-off logic optimization tool to make the decoder for you
<whitequark> which is quite sad
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<zignig> hooray for sleep deprivation.
<zignig> insomnia make for many very metaspaces.
<azonenberg> zignig: Meanwhile my sleep schedule is completely ruined as well
<azonenberg> on the 29th i flew back from holiday travels in a fairly distant time zone
<azonenberg> was home for one day of semi-normal hours then whatever bug i picked up over the holiday hit me this morning
<azonenberg> and i spent most of the day sleeping
<azonenberg> :p
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<zignig> :)
<zignig> all is well , I am pondering m-nigen metaclass CPUS. solving a n-dim maze. ;)
<zignig> *n-migen
* zignig has re-read whitequark's boneless twice.
<omnitechnomancer> I need to learn some nmigen
<azonenberg> And still awake, lol
<azonenberg> Starting to write the HMI code for my sump pump monitor. For once, a project not involving an FPGA
<azonenberg> just a raspberry pi with a 4-20 mA input module and a submersible liquid level sensor
<omnitechnomancer> Clearly you need to involve an FPGA
<zignig> omnitechnomancer: tinybx , with a ftdo serial port , bruse gateware USB is hard.
<zignig> *ftdi
* zignig has lost Ver keyboard FU.
<omnitechnomancer> zignig: hmmm?
<zignig> , python -i if anyine was WTFing.
<zignig> metaclass builder , CPU with minimum bits VIA python reflection. (not_ready)
<zignig> whitequark: swirl=o=tronic=wave
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<OK_b00m3r> azonenberg: .....does it really need something as big as an Rπ ;-)
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<azonenberg> OK_b00m3r: well i wanted to have an lcd on the front panel showing graphs
<azonenberg> and i'd rather code it up in GTK vs trying to do that with a stm32 etc
<azonenberg> the actual sensor stuff could be done on an 8-bit micro easily
* OK_b00m3r nods
<azonenberg> Plus there's a company over in canada that sells a handy little DIN rail mount enclosure for a pi plus some i/o modules like 4-20 sensor boards
<azonenberg> Which saves me the trouble of doing a custom enclosure for a board of my own design
<azonenberg> I have a project planned down the road called CREAKYLADDER which is going to be an INTEGRALSTICK based industrial control module with some combination of wide-range analog inputs, 4-20 inputs, relay/SSR outputs, etc
<azonenberg> But i've been too busy to work on it and the pi solution is available now
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<daveshah> So, I know people here like cursèd SPI stuff
<daveshah> The CrossLink-NX config primtive has fairly normal PERSISTSSPI for slave standard SPI and PERSISTSQUAD for slave quad SPI
* whitequark appears
<daveshah> but it also has PERSISTSHEXA and PERSISTSOCTA
<daveshah> neither mode documented anywhere else
<daveshah> now octal SPI isn't too bad
<daveshah> but hexa SPI is scary
<daveshah> how tf is a 8-bit-based protocol packed onto a 6 bit interface...
<whitequark> nice
<gruetzkopf> whaa
<whitequark> i wonder if it's like 4 lines in one direction, 2 in another
<whitequark> which isn't really much better but at least seems implementable
<daveshah> Hmm, that seems more plausible
<daveshah> FPGA config is quite asymmetric after all
<whitequark> why is it called PERSIST? does it do config readout?
<daveshah> Yeah, it is the option to keep a given interface open after init for readout, or reprogramming, etc
<whitequark> it doesn't have normal dual spi though, does it?
<daveshah> I saw a reference to that elsewhere - I think it might be PERSISTSSPI but with a different command set, like SPI flash - the set of pins don't change
<whitequark> interesting
<daveshah> It also has a I³C slave interface
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<daveshah> Ah, playing about with Radiant constraints it turns out "hexa SPI" is actually 16 bits not 6
<daveshah> really pushing the idea of "serial"
<daveshah> and pedantically I think this is a "sex SPI" interface
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<cpresser> did somebody reverseengineer one of those yet?
<jn__> cpresser: q3k
<cpresser> nope, he did the xilinx variant, not the lattice ecp5
<daveshah> No don't think I've seen those before
<jn__> cpresser: aah, i see
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<omnitechnomancer> daveshah: I think the k210 not very well documented risc-v thing has an octa-spi mode, which kind of seems more like a synchronous parallel bus really
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<q3k> cpresser: never seen that one before, looks cool
<q3k> cpresser: i might buy some and sand them if nobody else volounteers ^^
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* cpresser has a few of them in the shopping cart. I will try xray first
<cpresser> but unsure how much motivation I have for finishing a project like that
<rombik_su> Do you really need to sand it or scan with xray? There's only one BGA part, usual way (DMM + wiggling pins from FPGA) won't work?
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<rombik_su> q3k, cpresser: ^
<cpresser> rombik_su: I agree. Perhaps desolder the parts that have active outputs to no two drivers work against each other.
<gruetzkopf> let's hope they connected the DIR and OE inputs of those bus drivers
<futarisIRCcloud> Ooh. Lattice ECP5 variant of chubby75...
<rombik_su> BTW, I've found probably cheapest Zynq-7001 board on Aliexpress ($45), it's salvaged control board from miner rig. There's two flavors: EBAZ4203 (2 DRAM, soldered SD card slot) and EBAZ4205 (1 DRAM, SD slot not populated).
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<TD-Linux> the crosslink-nx doesn't have otp, does it?
<TD-Linux> it's too bad because if it did, in combination with the inwards facing configuration port I could make a fpga that boots natively from scsi zip drive
<daveshah> No, bar a few bits for keys and the feature row
<daveshah> Hah
<TD-Linux> cpresser, oh whoa that board looks handy especially because I have a hub75 project I want to do and I was going to basically make that exact board
* TD-Linux drops into cart
<q3k> rombik_su: i'm looking for an excuse to develop an optical recognition tool for reversing sanded boards :P
<q3k> rombik_su: but yes, you are right.
<rombik_su> Meanwhile sellers freaking out about demand skyrocketing from 4 to infinity
<TD-Linux> why are there two gigabit ethernet ports? is the idea you daisy chain?
<q3k> TD-Linux: yes.
<rombik_su> I wonder what they did with JTAG pins on this board. Don't see any test points.
<TD-Linux> do you have a suggestion for software/hardware that sends video to it with the stock firmware?
<TD-Linux> rombik_su, there are 4 obvious test points right next to the spi flash. plus there's J19
<rombik_su> TD-Linux: Yup, I see it, I just hope it's JTAG and not SPI.
<TD-Linux> I ordered one so we'll see
<TD-Linux> I might just desolder it and continuity test my way in
<rombik_su> There's a picture of back side:
<TD-Linux> wow there are to rams
<TD-Linux> *two
<rombik_su> TD-Linux: Looks like it's original source for those boards, there's software download: