ChanServ changed the topic of ##yamahasynths to: Channel dedicated to questions and discussion of Yamaha FM Synthesizer internals and corresponding REing. Discussion of synthesis methods similar to the Yamaha line of chips, Sound Blasters + clones, PCM chips like RF5C68, and CD theory of operation are also on-topic. Channel logs: https://freenode.irclog.whitequark.org/~h~yamahasynths
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<cr1901_modern> Welcome, ejs_A4000 from the past :D!
<ejs_A4000> heh, the A4000 even does IRC
<ejs_A4000> not too shabby for a 25 year old computer
* cr1901_modern is looking for his own portal to the past BRB
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<CR1901_286> Ahhh there we go
<CR1901_286> greetings from 1984
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<ejs_A4000> hmm, i could also run IRC on my 8088 but i ran out of ethernet ports on my router XD
<CR1901_286> I use thinnet plus a converter to get around that problem
<CR1901_286> mostly because I accidentally bought a pack of ethernet cards with only BNC and AUI connections
<ejs_A4000> yikes, thinnet
<ejs_A4000> collide much?
<CR1901_286> ehh not really
<CR1901_286> rare I have more than one machine on at a time
<CR1901_286> the _cables_ on the other hand... they are dodgy
<CR1901_286> I THINK I have a free 8 bit slot in this machine
<CR1901_286> I could put an Adlib or Snout Blocker card in it when I make one
<ejs_A4000> hmm, in theory i could put a Snerp Derper in this A4000
<ejs_A4000> don't think there's any software written to use it with this bridge board however.
<CR1901_286> Anything that used it on Amiga? I thought most audio was done through AGNUS chip
<ejs_A4000> there were a few sound cards you could buy but they were mostly for musicians
<CR1901_286> hmmm
<ejs_A4000> and the chip for audio was Paula
<CR1901_286> right, sorry
<CR1901_286> can you tell I'm a genuine vintage computer fan?
<ejs_A4000> XD
<CR1901_286> This is a 6 Mhz PC AT, btw
<CR1901_286> so it's the slowest 286 lol
<CR1901_286> (which is about 3.5 times faster than a 4.77 MHz 8088 IME)
<CR1901_286> It has: EGA/VGA card (using EGA monitor), MDA card plus parallel port, serial/parallel port, 2 more serial ports, and an Needham's PB-10 EPROM programmer.
<ejs_A4000> you
<ejs_A4000> are missing something
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<Nerionaya> do you have a dual monitor EGA/MDA setup
<CR1901_286> Nerionaya: I've done it before, but it's too bulky
<Nerionaya> I bet
<CR1901_286> not to mention, I don't have anything that can take advantage of it
<CR1901_286> except dumping to debug
<CR1901_286> ejs: what am I missing :P?
<ej5> no idea?
<ej5> i'll give you a hint--it has something to do with this channel
<CR1901_286> oh right, 3com 3c5x9 ethernet card XD
<CR1901_286> forgot that one...
<CR1901_286> I also have 2 5.25" floppies (1 HD, 1 DD), and two 20MB 5.25" disk drives
<CR1901_286> one of them is the original CMI 6426S (full height), the other is a half height NEC
<CR1901_286> huh, right... this machine turns 35 this year ._.
<CR1901_286> Okay time to change the time and go back to my laptop :D
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<ej5> i was thinking of an Ad Lib card XD
<cr1901_modern> ej5: >(8:36:21 PM) CR1901_286: I THINK I have a free 8 bit slot in this machine
<cr1901_modern> >(8:36:45 PM) CR1901_286: I could put an Adlib or Snout Blocker card in it when I make one
<cr1901_modern> :P
<ej5> there we go
<cr1901_modern> I didn't appreciate the value of old Adlib and Sound Blasters until it was too late to get one cheap on Ebay
<Wohali> "value"
<Wohali> ;)
<cr1901_modern> that pun hurts me :'D
<Wohali> oh, i wasn't tr ying to be punny...
<cr1901_modern> ahh
<Wohali> what's the value of an old adlib or SB?
<Wohali> or the worth, or wahtever
<cr1901_modern> I mean, it's FM synth in DIP package. It's original silicon!!11oneeleven
<cr1901_modern> Anyways I find DIP chips aesthetically pleasing
<cr1901_modern> but I didn't really start caring until vintage Ebay realized you can raise prices as much as you want and someone will pay for it
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<Wohali> wait for the bubble to burst on the market/SV
<cr1901_modern> you couldn't pay me to live in Silly Valley
<Wohali> i just mean, that should drop the bottom out of the antiques market
<cr1901_modern> ahhh right
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<fseidel> the moment I saw a listing "L@@K R@RE SONIC 2"
<fseidel> with a beat up copy of Sonic 2 for $200
<fseidel> I came to that conclusion about Ebay
<fseidel> RE: cr1901_modern
<cr1901_modern> sounds about right :/
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<whitequark> cr1901_modern: i mean, original silicon is kinda important
<whitequark> given th amount of counterfeiting
<cr1901_modern> whitequark: True...
<cr1901_modern> In that context, I was referring to how later chips just consolidated more components of the sound blaster into a single chip. Idk if it makes a difference for Sound Blaster, but >>
<cr1901_modern> When the Genesis FM synth was converted into a CMOS core that was part of a larger chip for Model 2 Genesises, there was a bug fix. And some composers relied on this bug when composing music
<cr1901_modern> To the point that non-gold-cable audiophiles have strong preferences over which core sounds better
* cr1901_modern doesn't have a particularly strong preference, but he grew up w/ a Genesis w/ the bug fix, so... :P
<whitequark> see that's why we should convert them all to verilog
<whitequark> add a bit in the LSI TEST REGISTER that enables the bug :P
<Wohali> indeed, i see no point in the original silicon, just recreate it :)
<Wohali> (at least, with digital, with analogue everything's different)
<cr1901_modern> aaaah, non square QFPs :D!
<whitequark> i swear to god we should all just switch to BGA
<Wohali> ugh bga manual rework :(
* Wohali xrays whitequark
<whitequark> you don't need xrays unless you do mass production
<Wohali> (which i've had to do in the past)
<whitequark> right
<Wohali> i don't like bga chip removal by hand.
<Wohali> reballing and soldering, not a problem.
<whitequark> hmm, i'm the opposite
<whitequark> removal is easy with the right tools and heat
<whitequark> i hate reballing though
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<cr1901_modern> whitequark: Agreed, except Comcass blocks emails from digital ocean IPs (unless you request to be whitelisted), so I can't test dovecot/postfix upgrades against my personal account: https://twitter.com/whitequark/status/1105335454424010753
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<Sarayan> whitequark, do you happen to be around?
<whitequark> Sarayan: sure
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<whitequark> so an YM3812 still works fine at 15 MHz ΦM
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<Wohali> dat's fast
<whitequark> "Vss: Grand
<whitequark> Conects the system grand"
<whitequark> wtf
<Wohali> that...doesn't even seem like usual translation mess
<Wohali> source or minus or something
<Wohali> 電源電圧 or マイナス電源
<whitequark> so, can someone look at ymf278 fig 1-5?
<whitequark> that figure is absurd. it requires time travel.
<Wohali> need link
<Wohali> but can give a quick look
<Wohali> where's the timetravel?
<whitequark> the bus is unstable until precisely tRDS before RD rising edge
<whitequark> how is the OPL4 going to know to stop changing the bus, if it has not seen the RD edge yet?
<Wohali> oh. hah. yeah that's odd
<Wohali> one moment
<Ultrasauce> also note that Trds is not defined in the timing table
<Ultrasauce> so you need an oracle that gives you semantics in addition to values
<Wohali> why tcsr and trw don't stop at the START of trds
<Wohali> that's very odd
<Lord_Nightmare> "system grand" probably meaning "system ground"
<cr1901_modern> Hence the Vss
<cr1901_modern> It's on the YM2151 datasheet too
<Wohali> ah, so, a transcription error! I went overboard on the printed angle
<whitequark> cr1901_modern: that was actually from YM2151 datasheet
<Wohali> and yeah, Vss being ground and not negative... always fun.
<whitequark> so you know how yamaha chips have write-only registers?
<whitequark> keeping in line with that, their datasheets are also write-only
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<cr1901_modern> heh, no one's gonna argue w/ that
<andlabs> brb changing the YM2413 datasheet to say it has 128 OPM channels
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<Ultrasauce> thats pretty neat
<Ultrasauce> ive had a hard time finding generative music like that that isnt...extremely unmusical
<whitequark> wait
<whitequark> waaaaaaait
<whitequark> do the OPL2 and OPL3 even have the same DAC format?
<Ultrasauce> iirc no
<whitequark> oh
<whitequark> OPL3 just streams... bare 16 bit samples?
<whitequark> lmao yes that works
* whitequark stares
<whitequark> no that doesn't.... no
<whitequark> what the fuck??
<whitequark> it's a floating DAC
<whitequark> how the fuck does this work
<whitequark> yeah no it doesn't sound quite right
<whitequark> but
<whitequark> it sounds even worse if i feed it into my FPtoUI converter
<whitequark> absolutely baffling
<Ultrasauce> the datasheet indicates its floats but multiple other sources allude to it being straight unsigned pcm
<Ultrasauce> or 'offset pcm'
<Ultrasauce> gonna file this one under time travel
<whitequark> Ultrasauce: oh
<whitequark> it says this in the DAC datasheet
<whitequark> "Inputted data is converted to floating point"
<Ultrasauce> ah ok
<whitequark> so it does FPtoUI conversion in OPL3 and UItoFP conversion in DAC
<whitequark> for whatever baffling reason
<Sarayan> it's fp because it's more than 16 bits
<whitequark> yeah no everything i put in there sounds super wrong
<whitequark> like bafflingly wrong
<whitequark> but
<whitequark> ugh what the fuck
<whitequark> is it ACTUALLY compatible with OPL and OPL2?
<whitequark> or is it sort of compatible?
<cr1901_modern> I guess register compatible does not imply DAC compatible
<whitequark> no, not this
<whitequark> i mean i put supaplex.vgm there
<whitequark> which is written for YM3812
<whitequark> and it sounds SUPER wrong
<whitequark> like a lot of very mute notes
<whitequark> for example
<Sarayan> I don't think it's register-compatible, no
<cr1901_modern> there's an OPL2 subset of OPL3
<whitequark> yeah but it SOUNDS different
<whitequark> hm
<whitequark> maybe i didn't reset it...
<Ultrasauce> Its analog output is obtained at the terminal "TO BUTT".
<Ultrasauce> heheh, butt
<Sarayan> hmmm, datasheet says it's register-compatible
<Sarayan> and that the dac output is 16-bits pcm
<Sarayan> they say "offset", which may mean unsigned
<whitequark> yeah, it looks unsigned to me
<whitequark> yeah no, YM3812 files don't seem to play well on YMF262 to me
<whitequark> let's see if YMF262 files fare any better
<whitequark> hm
<whitequark> they do not
<whitequark> and, they sound kinda quiet
<whitequark> did i misalign the output stream?
<whitequark> sounds (heh) like i did
<cr1901_modern> interesting... there's no DAC format in the datasheet?
<whitequark> nope
<ylamarre> But there is a DAC datasheet...
<whitequark> that doesn't have the format either.
<whitequark> remember, it's yamaha
<cr1901_modern> write only datasheets
<ylamarre> True...
<cr1901_modern> Ummm, I'm not sure... I have a few sound blasters... dunno if they use discrete OPL3s
<cr1901_modern> I could check thoses
<cr1901_modern> whitequark: Does the datasheet mention the actual DAC you need to use?
<whitequark> YAC512
<whitequark> and it's the one i desoldered
<whitequark> i can just decap the DAC
<cr1901_modern> yea what a weird dac...
<cr1901_modern> my guess is _maybe_ it was meant to be used w/ standard i2s dacs, then yamaha created their own anyway and just used the already existing IP plus a UItoFP stage?
<cr1901_modern> https://cloud.whitequark.org/s/dpDLH8JPikagQza I hear nothing wrong with this
<cr1901_modern> everything is perfect the way it is...
<cr1901_modern> can you save a git commit of the dac as-is :D?
<whitequark> sigh
<whitequark> look
<Wohali> i like the idea of user-selectable mutations
<Wohali> "do it rigth" "fuck up the floating point conversion for great lulz"
<cr1901_modern> Yes that is where I was going, but...
<cr1901_modern> Alright, I'll be serious for a minute... next step I'd try doing is to get a raw dump of the OPL3 output, and also a raw dump of the same file played through OPL2
<cr1901_modern> if you've not already done so
<whitequark> not yet
<whitequark> i want to look at the output with a scope first
<cr1901_modern> sure
<cr1901_modern> Aside from a phase shift, the waveforms should look very similar (but not exact) after conversion of OPL3 to expspace
<cr1901_modern> or OPL2 to linspace, choose your poison
<cr1901_modern> Wohali: I too would also like "corruption" mode... watching streamers corrupt Sega Genesis ROMs for the music to go ballistic is very satisfying
<Sarayan> so, geojson
<Sarayan> let's see if I can generate that
<cr1901_modern> geojson?
<Sarayan> wq, any idea how I can test whatever I generate
<Sarayan> cr1901: wq recommends it
<Wohali> i did a bunch of geojson in a former life
<cr1901_modern> hmmm
<Sarayan> to do a vector versions of the schematics map
<whitequark> Sarayan: there's a few online geojson viewers...
<Sarayan> Do you know of one handy?
<whitequark> not offhand
<Sarayan> heh
<Sarayan> geojson.io seems workable
<whitequark> ugh
<whitequark> really confusing interface
<whitequark> why does a 16 bit DAC get 18 bit samples???
<Sarayan> there are two unused clock pulses
<Sarayan> interestingly a number of yamaha synth chips output 18-bits samples
<Sarayan> so maybe they've used common hdl
<whitequark> hmm
<whitequark> wait
<whitequark> it's stereo
<whitequark> and i'm only grabbing one output
<whitequark> maybe that matters?
<cr1901_modern> Your noise.wav sounded like it was clipping, not that half the samples were missing
<whitequark> cr1901_modern: that's because it was clipping.
<whitequark> i am not talking about noise.wav.
<whitequark> i'm talking about the "correct" DAC implementation.
<cr1901_modern> oh whoops
<whitequark> hm
<whitequark> seems to be the same on A and B
<cr1901_modern> IIRC, you can grab one channel and it'll sound correct, just you're other ear will be missing sound
<cr1901_modern> your*
<whitequark> the CD channels are silent as expected
<whitequark> hrm
<Sarayan> you're sure you have the correct msb/lsb order?
<whitequark> uh, yes, swapping msb/lsb order results in something like white noise
<whitequark> i get actual music
<whitequark> it's just missing most notes
<Sarayan> oh good
<whitequark> wait, no
<whitequark> nonononono
* Sarayan waits for wq to finish rebooting
<whitequark> Sarayan: now to this https://cloud.whitequark.org/s/PZ9zaDFPRgoCXRp
<whitequark> this is not just a DAC issue for sure
<whitequark> it's a register issue
<whitequark> adding wait states seems to help
<whitequark> but kind of ... badly
<Sarayan> yeah, missing voices
<whitequark> hmm
<whitequark> wait
<whitequark> how do you put OPL3 into OPL2 mode?
<Sarayan> why not use an opl3 song instead for testing?
<whitequark> Sarayan: because those don't break as clearly
<Sarayan> do they break in the first place?
<whitequark> yes
<whitequark> they sound wrong for sure
<cr1901_modern> Yea that pain.wav looks as if half of the reg writes don't even make it to the chip
<whitequark> yes
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<Sarayan> oh, latencies are different, it's 32 cycles after address write, 32 after data write
<whitequark> yes, I correct for that, of course.
<cr1901_modern> does your oscilloscope have Logic analyzer? Confirm that the writes are actually there?
<whitequark> that part did not change since my OPL2 code running at the exact same rate
<whitequark> so I don't see how the writes would go anywhere.
<cr1901_modern> just thinking in order of simple to more complexs
<whitequark> hang on
<cr1901_modern> whitequark: Just out of curiosity... if you look at the VGM file, what's the maximum number of writes you see in between "delay 1/44100 sec" commands? I wonder if the datasheet is lying about latency
<Sarayan> adress -> data wasn't shorter for opl2?
<whitequark> Sarayan: it was and it doesn't matter
<whitequark> that code is parameterized over whatever latency is used
<whitequark> i have one source of truth for all delays and latencies
<cr1901_modern> sure... I'm just wondering if the datasheet is lying
<whitequark> waaaaaait
<whitequark> i have an idea
<whitequark> so i was thinking if maybe tying CS to ground is a bad idea
<whitequark> but no, seems to make no difference
<Sarayan> bedtime, have fun
<Sarayan> you didn't forget the two register banks btw? opl2 only has the one iirc
<whitequark> of course i did not
<Sarayan> good, and too bad, it would have been an easy answer
<Sarayan> 'night
<cr1901_modern> That Ultima soundtrack is really good
<cr1901_modern> whitequark: You bought multiple YMF262s or just one?
<whitequark> this one i desoldered from some board roommate brought here
<whitequark> but five more will arrive
<cr1901_modern> well, if all of them have the same problem I would think it's either: counterfeits, or writes aren't being honored :D
<whitequark> this one is def real
<whitequark> it was desoldered from an incredibly old isa sound card
<whitequark> datecode 9528
<cr1901_modern> hmmm
<whitequark> so i tried to use it as an OPL2
<whitequark> i.e. A1=L hardwired
<whitequark> same effect
<cr1901_modern> interesting...
<whitequark> oh what the FUCK
<cr1901_modern> fwiw, the OPL2 board I have... I get problems similar to that noise.wav you uploaded, with the cli- what?
<whitequark> address_clocks = 32
<whitequark> data_clocks = 32
<whitequark> this doesn't work
<whitequark> address_clocks = 288
<whitequark> data_clocks = 288
<whitequark> this work
<whitequark> the fucking piece of trash datasheet is fucking lying to me fucking AGAIN
<cr1901_modern> Are you running the chip at 15MHz in both cases?
<whitequark> i hate this fucking company so fucking much
<whitequark> yes
<whitequark> absolutely everything is identical except for wait states
<whitequark> and i have an idea why
<whitequark> gaaaaaaaaaaah
* cr1901_modern looks at the time when he first proposed the datasheet was lying
* cr1901_modern looks at the time now
<whitequark> these fucking morons
<whitequark> these idiots forgot that their fucking chip has a /4 clock divider at the front
<whitequark> they say that the latency is 32 master clock cycles
<whitequark> they mean the master clock INSIDE the chip
<whitequark> not the master clock OUTSIDE the chip
<whitequark> AAAAAAAAAAA
<cr1901_modern> BAHAHAHA
<cr1901_modern> Ouch ._.
<cr1901_modern> Join ##yamahasynths, where you can real time view wq's descent into despair
<cr1901_modern> (I take it 128 cycles works too?)
<whitequark> yes
<cr1901_modern> Hmmm, I remember when hooking up YM2151 onto my FPGA, I had trouble getting the busy bit to work properly
<cr1901_modern> I wonder if "master cycles inside the chip" was meant there
<cr1901_modern> as well*
<cr1901_modern> (clock divider by 2 on the YM2151 frontend)
<cr1901_modern> They never mention the divide by 4 in the datasheet?
<cr1901_modern> (They _do_ mention it for YM2151.)
<whitequark> they never do.
<cr1901_modern> That's a really bad oversight...
<cr1901_modern> prob was "common lore" back in the day, but isn't so widely known now
<cr1901_modern> What I find curious is that the bad wait state music is mostly silent rather than "1/4 of the writes are making it through"
<whitequark> that's because the address isnt' getting latched correctly
<cr1901_modern> Ahhh
<cr1901_modern> I think how it works is that there's a temporary "holding station" for address and data, and the 128 cycles is a worst case. If you disobey that, you get a previous address or previous data latched with the current data/current address respectively.
<cr1901_modern> https://twitter.com/topapate/status/1105599233762226176 FWIW, this is the person who created the YM2151 and YM2612 Verilog cores
<whitequark> wtf
<whitequark> W: g.applet.audio.yamaha_opl: OPx: client uses undefined feature [0x101]
<whitequark> W: g.applet.audio.yamaha_opl: OPx: client uses undefined feature [0x108]
<whitequark> W: g.applet.audio.yamaha_opl: OPx: client uses undefined feature [0x1bd]
<whitequark> why are OPL3 VGM files referencing nonexistent registers
<cr1901_modern> driver bug?
<cr1901_modern> not yours
<whitequark> driver?
<whitequark> oh
<whitequark> maybe
<cr1901_modern> I mean the music driver
<whitequark> or capture bug.
<whitequark> hm, this is PC/AT
<whitequark> should be reliable
<whitequark> ok
<cr1901_modern> Very very bad oversight not to put the clk divider in the datasheet... I didn't think to ask b/c they actually _did_ put it in the datasheet for 2151. Because why be consistent w/ omitting important info?
<cr1901_modern> whitequark: I have an idea of how ppl would've figured out the 32 cycles would apply _after_ the clock divider. >>
<cr1901_modern> They would've programmed frequency tables in their music drivers for 14MHz and then wonder why it sounds 2 octaves higher than expected
<cr1901_modern> Not that this helps us or excuses Yamaha
<whitequark> i mean, i had to add a factor of 4 for OPL/OPL2 mode
<TD-Linux> probably actually they all started with drivers for an older YM chip and ported it and it worked ok
<whitequark> but i assumed the divider is just enabled by the NEW bit
<cr1901_modern> >i had to add a factor of 4 for OPL/OPL2 mode Wait, what?
<whitequark> hm let's see if it still works at 30 MHz
<whitequark> cr1901_modern: well
<whitequark> i play VGM files that specify OPL2 on OPL3
<whitequark> and i have to correct the clock rate
<whitequark> or the output sample rate is wrong
<whitequark> and my resampling is also wrong
<whitequark> ok yep
<whitequark> it works at 30 MHz input clock
<whitequark> would be very surprised if it didn't
<whitequark> since the only part running at 30 MHz is the divider
<cr1901_modern> whitequark: Sorry I don't follow... what exactly are you correcting when playing "OPL2 on OPL3" and how does it differ from "OPL2 alone" and "OPL3 alone"?
<whitequark> cr1901_modern: the vgm file tells me the master clock frequency for the OPL or OPL2 or OPL3
<whitequark> if i play an OPL2 VGM on an OPL3
<whitequark> the clock frequency is wrong
<cr1901_modern> right it's 4 times higher than it's supposed to be, but shouldn't the divider inside OPL3 take care of that?
<whitequark> it has nothing to do with the divider
<whitequark> the clock frequency in VGM is used for exactly 1 purpose
<whitequark> figuring out what "wall clock" sample rate the OPL3 output is at
<cr1901_modern> So you just wait 4 times as long between writes as you would if you were playing on a real OPL2, correct?
<whitequark> no
<whitequark> this has absolutely nothing to do with the OPL at all
<whitequark> forget about hardware
<whitequark> OPL is a pure function that eats a VGM and returns a bitstream
* cr1901_modern nods
<cr1901_modern> Some *something* in your OPL function has to account for that VGM can return one frequency or that same frequency times 4
<cr1901_modern> s/Some/so/
<whitequark> no
<whitequark> absolutely nothing there depends on the VGM clock
<whitequark> ugh, forget it
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<whitequark> wtf
<whitequark> it's still skipping notes
<whitequark> it wasn't doing this a few minutes ago
<cr1901_modern> >ugh, forget it
<cr1901_modern> Sorry, I get it now. I had to just shut up and think for a bit longer than I wanted.
<whitequark> hm
<whitequark> so, 64 wait states work
<whitequark> 32 or 33 do not
<cr1901_modern> 128 doesn't?
<whitequark> i mean
<whitequark> 64*4 and 32/33*4
<whitequark> 32*4 or 33*4 that is
<cr1901_modern> ahhh okay
<whitequark> maybe 48*4?..
<whitequark> ... 36?
<whitequark> one half sample rate?
<whitequark> yep
<whitequark> 36 works
<whitequark> what the fuck
<cr1901_modern> >it wasn't doing this a few minutes ago Hmmm
<whitequark> i just didn't notice
<whitequark> it's subtle
<whitequark> very few notes get missing
<whitequark> but they do
<cr1901_modern> https://twitter.com/whitequark/status/1105608385486077952 Oh... so 36 _does_ make sense...
<whitequark> yes of course it fucking does
<cr1901_modern> maybe 32 made sense for... ahhh fuck it, I don't know either
<cr1901_modern> whitequark (when you have the spoons): How long have you realized you had to add a factor of 4 for "OPL2 on OPL3" during resampling? I assume you've known before this whole datasheet fiasco started tonight?
<whitequark> um, immediately after reading their summary
<whitequark> because the clock is 4x higehr
<cr1901_modern> So you were under the impression (until about an hour ago) that the rest of the chip took advantage of the 14.whatever MHz clock, but the OPL2 output didn't?
<cr1901_modern> (yes there's a point to me asking this)
<whitequark> i didn't think about it too hard
<whitequark> i just implemented the parts i knew about
<cr1901_modern> Ahhh
<whitequark> like an idiot, assuming the datasheet has at least some truth in it
<cr1901_modern> >probably actually they all started with drivers for an older YM chip and ported it and it worked ok
<cr1901_modern> TD-Linux: Yes, thinking about this more, this is almost certainly the correct answer
<cr1901_modern> What was the freaking point of upping the clk speed anyway if nothing uses it?!
<whitequark> because fuck you, that's why
<cr1901_modern> The OPL2 emulation could've worked with a 14.whatever MHz clock if they quadrupled (or hell even interpolated) the sin/exp table size. Guess they decided it wasn't worth the space cost.
<whitequark> i -think- OPL3 actually sounds better than OPL2 even in OPL2 mode
<whitequark> that's because it has true 16 bit PCM output
<whitequark> even though the DAC probably butchers it later
<cr1901_modern> hmmm
<cr1901_modern> anyways, I wouldn't have given the 14 MHz clock a second thought initially if I were in your positon. So I would've ended up w/ music that was 4 times as fast :P
<cr1901_modern> Before realizing something was wrong*