2019-02-21 06:40
ChanServ changed the topic of ##yamahasynths to: Channel dedicated to questions and discussion of Yamaha FM Synthesizer internals and corresponding REing. Discussion of synthesis methods similar to the Yamaha line of chips, Sound Blasters + clones, PCM chips like RF5C68, and CD theory of operation are also on-topic. Channel logs:
https://freenode.irclog.whitequark.org/~h~yamahasynths
00:34
futarisIRCcloud has joined ##yamahasynths
00:59
<
mofh >
23:19:09 < Lord_Nightmare> an unholy combination of both chips on one die
00:59
<
mofh >
what the actual fuck
01:00
<
TD-Linux >
oh the -112 or whatever
01:11
andlabs has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
01:20
<
cr1901_modern >
I mean, OPL/OPN on a chip
_might_ make sense for the 10 people who used DOSV in Japan, but I'm pretty sure games that run on PC-98 won't work on a PC compat and vice versa
01:27
<
Wohali >
thought there was some sort of compat shim someone wrote, but i could be misremembering.
01:35
<
cr1901_modern >
First time I've ever seen a scanned document uploaded as an SV- oh wait, it's not scanned
01:40
andlabs has joined ##yamahasynths
01:48
<
ej5 >
early to mid 2000's phone?
01:49
<
ej5 >
yeah looks like '04 date codes on at least 1 chip
01:49
<
cr1901_modern >
Oh good a Broadcom chip
02:27
<
Lord_Nightmare >
that's the model that is
02:30
<
Lord_Nightmare >
probably covers most of the sony phones with fm
02:48
andlabs has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
03:11
andlabs has joined ##yamahasynths
03:40
rainwarrior_ has quit [Quit: Page closed]
04:11
ej5 has quit [Read error: Connection reset by peer]
05:34
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
06:04
<
Lord_Nightmare >
I'm not sure what else it resets. phase counters and envelope stuff? who knows. needs testing.
06:04
<
Lord_Nightmare >
It resets the tremolo lfo, but NOT the vibrato LFO
06:04
<
Lord_Nightmare >
I assume one of the bits in the vrc7 FM 'TEST' reg (register address of 0x0F) DOES reset the vibrato LFO
06:20
futarisIRCcloud has joined ##yamahasynths
07:35
<
ValleyBell >
Lord_Nightmare: IIRC "OPN3" was OPNA without the DeltaT part
07:38
<
ValleyBell >
I also wonder whether or not the 4-bit PCM test mode works on the VRC7.
08:59
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
09:03
superctr has joined ##yamahasynths
09:52
nukeykt has joined ##yamahasynths
13:13
l_oliveira has joined ##yamahasynths
13:45
andlabs has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
14:07
andlabs has joined ##yamahasynths
15:03
andlabs has quit [Ping timeout: 250 seconds]
15:35
andlabs has joined ##yamahasynths
15:39
andlabs has quit [Ping timeout: 240 seconds]
16:08
andlabs has joined ##yamahasynths
18:43
nukeykt has quit [Quit: Page closed]
18:53
<
Lord_Nightmare >
4-bit pcm test mode?
18:53
<
Lord_Nightmare >
what is that?
19:00
nukeykt has joined ##yamahasynths
19:15
<
Lord_Nightmare >
wtf
19:15
<
Lord_Nightmare >
that's documented exactly nowhere
19:15
<
Lord_Nightmare >
so bit 0 of the test reg 0x0F turns reg 0x10 high nybble into driving the high 4 bits of the dac
19:18
<
Sarayan >
LN, yamaha VL70M, does it ring bell?
19:21
nukeykt has quit [Ping timeout: 256 seconds]
19:28
<
ValleyBell >
Yes, the documentation on that test mode is pretty much non-existent. There is only one Japanese page and this forum post.
19:30
<
Lord_Nightmare >
and bit 3 ?disables the fm output?
19:30
<
Lord_Nightmare >
that's weird
19:30
<
Lord_Nightmare >
i'm guessing bit 3 is really freezing the internal phase counters
19:31
<
Lord_Nightmare >
on ym2151, according to jarek's notes in ym2151.txt in the MAME source:
19:32
<
Lord_Nightmare >
bit 3 - HPGL (Halt Phase Generator AND LFO amplitude modulation)
19:32
<
Lord_Nightmare >
When 1 - Phase Generator is halted. Also amplitude modulation
19:32
<
Lord_Nightmare >
(from LFO to Envelope Generator) is halted.
19:32
<
Lord_Nightmare >
You can use this bit to analyse Envelope Generator work.
19:32
<
Lord_Nightmare >
As it was in the case of HEG bit you need to know
_EXACTLY_ when to set this bit.
19:32
<
Lord_Nightmare >
Unfortunately, there is no
_simple_ way. You will need to synchronise on the chip
19:32
<
Lord_Nightmare >
output signals to know when to set it.
19:32
<
Lord_Nightmare >
that may be doing EXACTLY the same thing here
19:32
<
Lord_Nightmare >
on the opll
20:14
<
Lord_Nightmare >
so ymz284 and ymz294 are cmos(?) dip8/dip10 versions of the SSG
20:15
<
Lord_Nightmare >
ymz294 is SSGLP
20:20
<
superctr >
YMZ705 - (SSGS) Includes two SSGs and 8 ADPCM channels, as well as a built in sequencer.
22:57
cr1901_modern1 has joined ##yamahasynths
22:57
cr1901_modern has quit [Ping timeout: 245 seconds]
23:33
Xyz39808 has joined ##yamahasynths
23:34
Xyz_39808 has quit [Ping timeout: 264 seconds]
23:45
andlabs has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]