_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<Skip> john_k[m]: Thanks for the Pano logic port! I got so excited I didn't research who did the original work.
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<zyp> is there a convenient way to manually define the layout of a CSR bank?
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<zyp> did some digging and I guess by implementing get_csrs() I can define the order of the CSRs by ordering the list I return, but I guess there's no way to provide gaps in the layout?
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<mithro> zyp: ask @xobs
<mithro> zyp: He cares way to much about his CSR layout for "software compatibility reasons"
<mithro> zyp: My general policy is that the CSR layout is an internal implementation detail and the correct interface points are the generated C functions / csr.csv / csr.json
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<zyp> what is correct for one application might be unsuitable for another :)