ChanServ changed the topic of #nmigen to: nMigen hardware description language · code at https://github.com/nmigen · logs at https://freenode.irclog.whitequark.org/nmigen · IRC meetings each Monday at 1800 UTC · next meeting TBD
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<modwizcode> can someone explain the meaning of the xdr parameter on pins? I've looked at the code but I can't quite understand what values >2 mean
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<tpw_rules> more than DDR
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<_whitenotifier> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/Jt4fn
<_whitenotifier> [YoWASP/yosys] whitequark 4b0c34c - Update dependencies.
<_whitenotifier> [nmigen] jreyesr commented on pull request #575: Lattice: Add support for MachXO2/XO3L internal oscillator - https://git.io/Jt4kl
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<hell__> tpw_rules: interesting, https://en.wikipedia.org/wiki/XDR_DRAM seems to be a real thing
<daveshah> pftbest: I think the Versas might actually be 1.35V? The difference isn't very big but you might as well use the correct standard
<daveshah> In practice I suspect interchanging them isn't going to cause any problems, other than the termination resistance being slightly off
<pftbest> I have a link to the user manual with schematics, can you please take a look at page 23?
<daveshah> istr that I measured and it was actually 1.35V
<daveshah> anyway I'm not sure if there is actually any bitstream difference at all between the settings
<pftbest> maybe it is configurable and can be adjusted at runtime?
<daveshah> what do you mean?
<pftbest> i don't know how else to explain that schematics says 1_5 but you measured 1.35. Maybe their pmic can change voltage?
<pftbest> or schematics is old
<daveshah> no its not configurable, its more like they just populate it with different resistors in practice
<pftbest> well, ok then. Since my board is using 1.5v then i guess i need to make a Pull Request for nmigen-boards
<daveshah> sorry, I was wrong, I checked again and my board is 1.5v too
<pftbest> daveshah: page 53
<daveshah> if you actually look at the bitstream there is no difference between 1.5v and 1.35v - in diamond it might change some of the io timing/power/sso reports but none of those things nextpnr supports yet
<pftbest> I checked the svf file and it has different bits set when I run ecppack
<pftbest> so it changes some bits on the chip
<pftbest> daveshah: sorry, I was wrong. It has the same bits for SSTL15 and SSTL135
<pftbest> so you are right, it doesn't matter
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<pftbest> thanks for your help
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<nickoe> mmm
<nickoe> I wonder what I did to make this nor work.. https://dpaste.com/E7Q5ZRY2X
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<_whitenotifier> [nmigen-boards] pftbest opened pull request #138: ecpix-5: ddr3: Add missing address pin. - https://git.io/Jt4gD
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<nickoe> pftbest: Mm, a bit sad that it does not appear that a working ci exists on the biard repo right now :S
<tpw_rules> hell__: it's also useful for things that are not RAM in some circumstances
<hell__> tpw_rules: ah yes, the FSB is a quad-pumped bus
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<modwizcode> Quad pumped always sounds so extreme
<nickoe> modwizcode: ??
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<nickoe> whitequark Friendly ping on https://github.com/nmigen/nmigen/pull/584
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<DX-MON> for anyone interested, I'm about to do a nMigen-based stream - https://twitch.tv/dx_mon
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<nickoe> DX-MON: What are you going to make?
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<modwizcode> mark
<modwizcode> heck
<nickoe> modwizcode: ?
<modwizcode> just typed in the wrong window
<nickoe> mm, ok
<nickoe> Anyone able to run "python3 setup.py test" and it actually running more than zero tests?
<nickoe> in nmigen-boards that is
<modwizcode> It runs test here. It also tells me not to use that as a test entrypoint but that might not matter
<nickoe> modwizcode: mm, it looks like so to me https://dpaste.com/H3F2WVWDF
<modwizcode> I am corrected it says that here too however I had forgotten to install nmigen first and it failed the tests on imports now it reports as you show
<modwizcode> as far as I can tell the blinky file in test isn't setup as a test in any way
<nickoe> I can import nmigen and nmigen_boards just fine in a python shell, so why it is different for me? modwizcode
<modwizcode> It's not different?
<modwizcode> I told you, I didn't have nmigen installed when I first ran the test (I did the test in a vm I just setup so it wasn't fully setup yet)
<modwizcode> once I installed the software that command had the same results
<modwizcode> *installed nmigen
<nickoe> ok
<modwizcode> I don't think there's any actual tests like runing `setup.py test` would handle in nmigen-boards. The "test" subdirectory has an example nmigen project that several boards import and attempt to flash if you run them directly. If you look at nmigen, it has a "tests" folder in the top level of the repo that contains actual tests.
<nickoe> modwizcode: yeah, well, "python setup.py test" is used in the github "workflow" script, altbeit it is also failing, but it actually tries to un stuff, where for me it just looks like it runs zero tests and not the same output as on the ci. Maybe that is because the CI does not install nmigen?
<vup> nickoe: it does not run any actual tests, but it imports every file, so atleast it catches "obvious" stuff like typos, syntax errors, etc
<vup> it would be nice to get actual tests some day, but its just a lot of work
<modwizcode> ah I was wondering how the heck it was failing because nowhere is stuff defined as a test
<vup> its currently failing, because it is using the released version of nmigen (on purpose), which does not yet support some of the vendors used in the boards
<modwizcode> ah
<vup> how to resolve that is still a open question, the current ideas are discussed here: https://github.com/nmigen/nmigen-boards/issues/128
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<nickoe> vup: I guess one could make it at least run the export of verilog code
<vup> nickoe: yep for sure, thats already outlined in #128
<nickoe> vup: https://github.com/nmigen/nmigen/pull/584 this should unblock using symbiflow for the artix7 stuff
<vup> nice, btw what is the status of that?
<vup> (i mean symbiflow for artix7)
<nickoe> it works
<nickoe> I tinnk 30 percent or so of the fpga primiteves are implemented, but those are mostly the simple ones. But I could run the picosoc example on the basys3
<nickoe> from symbiflow-examples
<vup> is more "fancy" stuff supported, like MMCM + PLL + DSP + *SERDES?
<vup> I see
<vup> so no "fancy" stuff yet :(