Lofty changed the topic of #prjmistral to: Project Mistral: Yosys (and hopefully nextpnr) on Cyclone FPGAs - https://github.com/ZirconiumX/mistral - logs: https://freenode.irclog.whitequark.org/prjmistral
<awygle> how's it going these days, Lofty, Sarayan?
<Lofty> awygle: we have the Arria V databases archived, and I think rombik_su is going to dump the Stratix V databases at some point
<awygle> how's the mister stuff?
<Lofty> Eh, I don't have very high hopes for it, but whatever
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<Sarayan> my brain is fried, so let's do something that doesn't need any: transcribing the last missing peripheral blocks muxes
<Sarayan> now that I have the pram right
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<Sarayan> the hssi configuration is damn big
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