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<pdp7> thanks :)
<pdp7> killruana:
<pdp7> killruana:
<pdp7> oops
<pdp7> I was meaning to ask if there are instructions for using the Antmicro Arty Expansion board
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<gg77> Hello everyone. I recently did my coursework in FPGA especially on artix7 basys3board ( xc7a35tcpg236-1) and I am comfortable with FPGA design and its components. I am also comfortable with verilog and C. I saw the project xray and found it exciting. Can anyone please update me about what we are currently working on so that I can look up the
<gg77> required resources and start working on it.
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<ZirconiumX> Jeez, is Project X-Ray the only thing Symbiflow is known for?
<ZirconiumX> gg77: how much do you know of FPGA architecture? As in, how FPGAs work.
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<hackerfoo> I think it's very confusing from the outside. The output of Project X-Ray and symbiflow-arch-defs is mostly data that can be used by other tools, such as VPR and Yosys. So users will never really see them in the end. And then there's nextpnr, which can use some of that data, but is not what the SymbiFlow project is targetting.
<ZirconiumX> Which is a shame I think
<hackerfoo> And then a lot of effort goes into VPR.
<hackerfoo> ZirconiumX: Which part? I'm fine with the project melting away into history if it leads to open source EDA.
<ZirconiumX> VPR, mostly.
<ZirconiumX> The ecosystem does not in any way benefit from redundancy when it's this small
<hackerfoo> VPR is older than nextpnr, right? And has been proven to work for large FPGAs.
<ZirconiumX> VPR is still fundamentally simulated annealing, right?
<hackerfoo> We just don't have the time for both of them, but if nextpnr works out, that's great too.
<hackerfoo> Yeah, for placement.
<ZirconiumX> If we don't have time for both, why pick the technologically inferior one?
<ZirconiumX> Why make things harder for yourselves?
<hackerfoo> I don't think it's well tuned for xc7 yet. I'm working on it. SA can be pretty powerful, and more importantly, flexible.
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<hackerfoo> VPR is designed to work for many architectures.
<ZirconiumX> I'm here targeting mostly EP5C and VPR is explicitly a non-goal of mine
<ZirconiumX> After all, Quartus still to this day is built on VPR, but they haven't opened up any of their changes.
<ZirconiumX> Nextpnr was designed to be portable from the beginning too so portability there is a non-argument
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<hackerfoo> I'm not arguing against nextpnr. I've only worked on VPR, because that's what we're using.
<hackerfoo> If there was a good reason to change, I'd look at nextpnr.
<ZirconiumX> HeAP is a very good reason for example
<ZirconiumX> If we want to convert people to use FOSS tools over proprietary tools, we should be leading the state of the art, not trailing it
<hackerfoo> That's not true. We just need something that works.
<ZirconiumX> So you build it and then what? They come, use something *slower* than the vendor tools that doesn't come with a vendor warranty, and they'll be happy?
<hackerfoo> The hope is that they will join in and make it better.
<hackerfoo> We take the risk out, and they get to have fun improving the tools.
<ZirconiumX> But businesses don't get paid to have fun.
<hackerfoo> That's pretty much how open source works i.e. worse is better.
<ZirconiumX> No, not particularly. Qt, GCC and Linux are good examples of where worse is worse
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<hackerfoo> Those are all more successful than anything I've done.
<ZirconiumX> Would you mind giving an example of the most successful project you've done, then?
<hackerfoo> Personally: https://github.com/HackerFoo/poprc/
<tpb> Title: GitHub - HackerFoo/poprc: A Compiler for the Popr Language (at github.com)
<hackerfoo> But I guess as a group, it's hard to do a fair comparison, I guess.
<hackerfoo> None of those projects were made by one person.
<sf-slack> <garvit.gupta08> As of architecture I am very well aware of luts, block rams and fifo. My work mostly was to use them to implement required functionality.
<sf-slack> <garvit.gupta08> gg77 is my irc username
<ZirconiumX> So how does a Xilinx LUT6 work?
<ZirconiumX> As opposed to a Lattice ECP5 Slice?
<ZirconiumX> Or an Intel ALM
<ZirconiumX> (I believe the equivalent term for an ALM in Xilinx parlance is CLB but I'm not 100% sure
<ZirconiumX> )
<ZirconiumX> hackerfoo: it's a fair comparison of a group project against a group project, I think
<sf-slack> <garvit.gupta08> LUT6 comprises of two lut 5 having same set of 5 bit address line and and one select line for the mux to choose the output for anyone of the luts.
<ZirconiumX> For the record, that's the best I've seen so far
<ZirconiumX> Out of about four people
<sf-slack> <garvit.gupta08> I am not aware of Intel alm and lattice ECP5 slice.
<ZirconiumX> Maybe I should have better referred to the ECP5 slice as a PFU, but anyway
<ZirconiumX> So, Symbiflow contains a bunch of different tools, as it's a full flow
<ZirconiumX> Yosys provides synthesis, VPR or nextpnr provide place-and-route, and Project X-Ray provide bitstream tools
<sf-slack> <garvit.gupta08> I want to work on projectxray as I am familiar with 7 series architecture.
<sf-slack> <garvit.gupta08> I studied some of the resources related to it on site but does not know the current status of where project i
<sf-slack> <garvit.gupta08> *where the project is?
<tpb> Title: symbiflow-arch-defs/xc7/tests at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)
<tpb> Title: Issues · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)
<hackerfoo> Or "help wanted"
<sf-slack> <garvit.gupta08> Project-arch-defs deals with what part of the flow?
<ZirconiumX> It's data loaded by VPR I think
<ZirconiumX> <hackerfoo> I think it's very confusing from the outside. The output of Project X-Ray and symbiflow-arch-defs is mostly data that can be used by other tools, such as VPR and Yosys. So users will never really see them in the end. And then there's nextpnr, which can use some of that data, but is not what the SymbiFlow project is targetting.
<hackerfoo> It's mostly about generating the routing resource graph and architecture description using data from Project X-Ray.
<hackerfoo> It also runs the whole flow to test it out, but it's not really designed for users, more for testing.
<sf-slack> <garvit.gupta08> Okay, so to generate the routing resource graph we do have to provide some design of circuit to which place and routing will take place? How do we do that?
<hackerfoo> All the data required to generate the routing resource graph, which describes the routing fabric in the FPGA, comes from https://github.com/SymbiFlow/prjxray
<tpb> Title: GitHub - SymbiFlow/prjxray: Documenting the Xilinx 7-series bit-stream format. (at github.com)
<hackerfoo> And it takes a long time to generate, so we periodically update https://github.com/SymbiFlow/prjxray-db
<tpb> Title: GitHub - SymbiFlow/prjxray-db: Project X-Ray Database: XC7 Series (at github.com)
<hackerfoo> Describing the architecture is more of a manual task: https://github.com/SymbiFlow/symbiflow-arch-defs/tree/master/xc7/primitives
<tpb> Title: symbiflow-arch-defs/xc7/primitives at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)
<hackerfoo> But we use automation where we can.
<tpb> Title: Welcome to Project X-Ray Project X-Ray 0.0-3049-g418063af documentation (at prjxray.readthedocs.io)
<tpb> Title: SymbiFlow documentation SymbiFlow (at symbiflow.readthedocs.io)
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<hackerfoo> I improved the VPR placer so much that it broke a bunch of the tests with better than expected scores.
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