clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<emeb_mac> awygle: Interesting - tbh I haven't paid much attn to the power requirements of the various ADCs I've used. Mostly interested in high rates & resolution and that always has a cost.
<awygle> emeb_mac: sure! whereas my applications are almost all narrowband and power-constrained
<awygle> different constraints, different design (despite all the SDR hype ;)
<emeb_mac> awygle: for really narrowband stuff it might make more sense to go with more analog in the front end.
<awygle> emeb_mac: yes, that's what i've historically done. but it would be nice to be able to play more interesting protocol games
<emeb_mac> my HFRX radio has very similar back-end processing as iceradio, but uses a QSD to convert RF to I/Q analog, then uses a high-res 50kSPS ADC
<emeb_mac> might be a better fit for what you want
<emeb_mac> of course a QSD has some of its own problems, but those are solveable...
<awygle> oh that is interesting. i've never tried a QSD before
<tpb> Title: HFRX (at ebrombaugh.studionebula.com)
<emeb_mac> awygle: you probably have seen the circuit used - just not always called that.
<awygle> i had put together a similar design (in the sense of using a high-end STM) but with a more conventional downconversion stage, but i couldn't get it to hit all three of performance/power/price targets
<emeb_mac> yeah - designing radios is a vast multi-dimensional space to optimize
<awygle> yup yup
<awygle> sadly i'm mostly out of this game now but i'll definitely do more reading on this approach
<emeb_mac> that STM32F373 is a fun part - it's got some really nice 16-bit differential ADCs that are surprisingly low noise.
<emeb_mac> worked pretty well for doing the DSP on the back end of that quadrature ZIF front-end.
<awygle> it appears from my notes i was looking at the F303
<emeb_mac> Very similar part, but w/o the good ADCs
<awygle> i think i might have been aiming for higher sampling rate and paying less attention to performance
<awygle> but it was a long while back
<emeb_mac> If power is an issue then iceRadio was definitely not optimized for that.
<emeb_mac> especially with the R820T2 VHF front end - that thing gets pretty toasty.
<awygle> the interesting aspect of that design from a power perspective is that the ice40up potentially represents a very low-power way to do the baseband processing
<awygle> although it's sort of unclear to me how it would compare to something like an STM
<awygle> (i'll freely admit i am better at the frontend than the digital stuff)
<emeb_mac> Well, the FPGA is fairly low-power, but I use it to do the wideband downconversion all digitally. An STM32 doesn't have the horsepower to handle 40MSPS data in any way.
<emeb_mac> That high sample rate means it's able handle most of the HF band in one gulp, but it immediately reduces it down to a ~40kHz bandwidth, so some might argue there's more efficient ways to do that.
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<awygle> ideally i would like to take in something like a 500k-2Mbps QPSK signal and put demodulated bits or even higher-level packets out over something like I2S. perhaps including FEC in the fpga as well
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<awygle> ah well. someday. too many irons in the fire already to work on something like that now.
<emeb_mac> That's probably doable in a UP
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<ZipCPU> Woohoo! All six butterfly forms are now working. That means the whole FFT works as well! Yaaaaayyyy ...
<ZipCPU> Must mean its time for bed.
<ZipCPU> Sigh. Celebrating too soon. I had the first three multiplies working, and ... they aren't anymore. I'll have to check the git history on Monday. *SO* close.
<ZipCPU> s/multiplies/butterflies/
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