<ZirconiumX>
daveshah: So, my current Quartus exploits have me writing to EDIF. Which is a pain to debug when trying to map "a problem in the EDIF" to "a problem in the Verilog netlist"
<ZirconiumX>
Any tips/advice?
plaes has joined #yosys
<daveshah>
Yosys EDIF is very specific to Vivado
<daveshah>
Does Quartus have EDIF output? I would start looking at what it generates
<ZirconiumX>
daveshah: Nope, only input. But it seems that it accepts Yosys' EDIF output just fine
<daveshah>
FYI, there have been bugs in the past where the EDIF is accepted but it turns out eg cell port vectors are reversed
<ZirconiumX>
At the moment I have a Quartus issue where it complains that a DFFEAS port cannot be connected
<ZirconiumX>
Which I'm pretty sure means that it doesn't exist in hardware for the CV
_whitelogger has joined #yosys
<cr1901_modern>
ZirconiumX: Idk if you tried this already, but you describing the problem in ##openfpga yesterday made me think of using C-reduce or the program its based off of (delta): https://github.com/csmith-project/creduce/tree/master/delta
<ZirconiumX>
cr1901_modern: I have not, I'll admit, but my time is more limited than most
<ZirconiumX>
So, having sorted out the DFFEAS bug from a stupidly obscure error message
<ZirconiumX>
I now have a new and unique error message
<cr1901_modern>
ZirconiumX: I would help, but I don't have Altera installed and I'm not in a position to do so right now :(
<cr1901_modern>
(if you _wanted_ help I mean)
<ZirconiumX>
I definitely won't object
<ZirconiumX>
cr1901_modern: The error message itself is not particularly difficult to diagnose
<ZirconiumX>
Error (274007): Net name "GND_NET" is used multiple times, but should be used only once
<ZirconiumX>
I can't tell if this is Quartus being picky or EDIF being picky
alexhw has quit [Ping timeout: 252 seconds]
X-Scale` has joined #yosys
X-Scale has quit [Ping timeout: 268 seconds]
X-Scale` is now known as X-Scale
attie has quit [Ping timeout: 265 seconds]
X-Scale has quit [Ping timeout: 250 seconds]
X-Scale` has joined #yosys
X-Scale` is now known as X-Scale
<janrinze>
on the topic of up5k, how are the boards? I have the lattice breakout and the upduino v2. The latter is notoriously bad in respect to the oscilator frequency stability.
<janrinze>
Seems there is a v2.1 now but i'm not sure if it is any good. Also the IceBreaker is seriously overpriced, i.m.h.o. (77 euro's)
Jybz has quit [Quit: Konversation terminated!]
<tnt>
heh, I use the icebreaker and it's always been very reliable. Surely not the cheapest, but it's one of the best designed one.