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<pie_>
ugh...i just broke my firefox session somehow...
<pie_>
whenever i close firefox properly it breaks
<pie_>
ironically
<qu1j0t3>
you mean you lost it?
<pie_>
no it just hangs while oading
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<qu1j0t3>
:(
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<awygle>
Kicad users - do you ever reach the point where the user interface blends into the background? Trying to figure out how much of my dislike here is familiarity with a different system vs. just bad design
<rqou>
idk, don't use kicad extensively enough
<lain>
it's bad design, but PADS is even worse design and it has long since faded into the background for me
<lain>
(they're all bad design)
<rqou>
kicad needs a ui rewrite like blender got
<rqou>
but first it needs a general code cleanup
<rqou>
anybody want to try (again) to remove LOCALE_IO? :P
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<qu1j0t3>
how would they ensure a different outcome from a rewrite rqou ?
<rqou>
get some real UX people?
<rqou>
and/or make it fully scriptable
<awygle>
I tried to make it support fonts(!) on the schematic and quickly got buried in like nine text classes
<rqou>
have you not yet discovered LOCALE_IO? :P
<rqou>
c4757p is _super_ pissed off about that, but fixing it is tricky
<awygle>
That's my only attempt at hacking kicad and I spent like 30m on it
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<rqou>
first of all, would you like an explanation of what LOCALE_IO is?
<awygle>
Sure
<rqou>
it's a big global lock that wraps around all functions that perform any kind of IO
<rqou>
used to set the locale to "C" so that printf/scanf-based parsers/formatters work correctly
<rqou>
otherwise people in e.g. france will only be able to exchange files with other people in e.g. france and not with people in e.g. the us
<awygle>
Oh I remember you complaining about this on like my third day in this channel
<rqou>
yeah, i tried to fix it and it was hard
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<awygle>
I claim with the confidence of total ignorance that the right way to fix that is not to parse with printf/scanf
<rqou>
hmm, but it works for many simple files
<awygle>
But it breaks for many complex files, and anything containing floating point
<rqou>
why does it break for anything containing floating point?
<rqou>
worksforme(tm)
<jn>
2.5 is 2,5 in german, for example
<awygle>
Err, maybe not floating point maybe big numbers? Wasn't one of the issues. vs, for numbers?
<rqou>
. vs , is the issue kicad is hitting
<awygle>
I feel rqou is trolling
<rqou>
er, what?
<rqou>
it works if you use e.g. the musl implementation
<rqou>
i guess i should rephrase: barring locale-related issues, printf/scanf do correctly write/read floating point numbers in a correct implementation
<awygle>
but "barring locale-related issues" is the whole point of the discussion that requires LOCALE_IO
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<rqou>
right, so my previous attempt to fix this was "use musl's implementation, which explicitly will not use LC_NUMERIC"
<awygle>
the underlying issue is that you're not actually trying to store text, you're trying to store numbers, and you're using a text serializer/deserializer to do it
* awygle
also has a strong preference for binary formats though so maybe don't listen to him
<rqou>
apparently rich felker believes that storing numbers is common enough that he doesn't want lc_numeric support
<awygle>
so what did you try to do, rip out the musl implementation and add it to the kicad database? or force kicad to build against musl?
<awygle>
... database. source code. wtf brain.
<rqou>
my old attempt was to rip out the musl implementation standalone, and then replace all the functions with calls to musl_printf or musl_scanf or whatever
<rqou>
but it turns out that this is really invasive and easy to mess up
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<rqou>
especially since kicad also links to other libraries that _also_ use printf/scanf parsers
<rqou>
so a better way to do it is to probably set LC_NUMERIC explicitly to "C"
<rqou>
and hack wxwidgets to do the formatting correctly for numbers in the UI
<awygle>
well, none of this actually gets to the root of my issues with kicad, which are much more about ux than about , vs .
<qu1j0t3>
rqou | get some real UX people? // agreed
<rqou>
yes, this was just a tangent
<awygle>
does anyone else feel like the kicad devs don't... do PCB design? like... it seems like it would be hard to get things this wrong
<rqou>
maybe it has to do with the old maintainer being a dick?
<awygle>
honestly fixing libraries would solve a huge number of my complaints
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<rqou>
recently something floated past my timeline on the bird website and apparently blender used to _also_ have a similar problem
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<rqou>
it was something along the lines of "why does (did) blender's keybindings suck so much? because they emulate 'unix-style' keybindings rather than windows-style keybindings, because blender used to be an irix application"
<awygle>
i wonder if i could get somebody to pay me to fix kicad's library management. no commercial PCB software i've used does libraries well either (altium is closest and still has serious issues), so i feel like kicad could really differentiate in that space
* awygle
makes a note in the yak file
<rqou>
hmm, i wonder if library issues are blocked on some other core infrastructure changes?
<pie_>
tried to leave it going but ran out of memory wtf :|
<qu1j0t3>
rqou: Yeah I know that tweet...
<rqou>
awygle: really random question: do you happen to remember if the berkeley EECS department has a scanner with document feeder that students can use?
<rqou>
i have some "interesting" documents to digitize
<awygle>
rqou: i do not remember no.
<awygle>
"why is my disc so full??" >> 40GB of LLVM
<awygle>
>> 30GB virtual box vdi on my system disc for some reason
<awygle>
whelp problem solved
<qu1j0t3>
those things grow crazily
<qu1j0t3>
and there's not much warning :<
<qu1j0t3>
i need to manage my snapshots a bit better to avoid that
<awygle>
i usually pre-allocate a fixed size
<qu1j0t3>
i have one that i think is growing by _usage_ because I'm doing bulk scanning
<qu1j0t3>
(not keeping the files, but still growing)
<awygle>
lol wow
<qu1j0t3>
awygle: A good plan... i should consider this
<awygle>
i think it's actually faster
<qu1j0t3>
not 100% sure yet but i should revert last snapshot and see. might mean reinstalling one program, no biggie
<awygle>
i always remember snapshots exist ~10m after i should have created one... >_>
<qu1j0t3>
LOLLL
<awygle>
oh speaking of things i forgot existed, i should open this box and install the GTX 980 Ti sitting in a box behind me...
<qu1j0t3>
hahah
<qu1j0t3>
you sure you need it? I can PM my postal address!
<awygle>
qu1j0t3: you can have the GT740 it's replacing if you like...
<qu1j0t3>
actually that's not a bad idea.
<qu1j0t3>
awygle: can't confirm absolutely but if you want to work out a price let me know
<rqou>
btw awygle did azonenberg mention anything about brainstorming sessions?
<awygle>
rqou: haven't heard from him
<awygle>
hope both he and the residents of kitsap county are OK
<azonenberg>
o/
<azonenberg>
Back
<azonenberg>
Lol
<azonenberg>
Yeah i was AFK all week traveling overseas with limited internet access
<azonenberg>
I gave a talk on antikernel, as well as one on bitstream RE, to various research groups and classes at Ruhr-Universitat Bochum
<azonenberg>
and Christoph Paar's research group
<awygle>
i hope Christoph Paar does PAR research
<azonenberg>
also had a fun informal discussion on open source FPGA tech and how their research program could support / benefit from it
<azonenberg>
No, he's famous for infosec/crypto work
<azonenberg>
He co-founded CHES
<awygle>
bummer, pun opportunity missed
<azonenberg>
Anyway, then swung by Cambridge University on the way home
<azonenberg>
Originally to meet one person but ended up running into several other people i knew there
<azonenberg>
And got roped into giving a talk on Antikernel for the computer architecture group there
<azonenberg>
Lol
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<awygle>
if i download "vivado design suite - HLx editions" am i gonna get just the HLS stuff? or is that the right link to hit to get the normal fpga stuff?
<awygle>
azonenberg: well welcome back, sounds like a good trip
<azonenberg>
That should get you everything
<lain>
off-topic: any idea why X forwarding might be crazy slow between guest and host (freebsd host, linux guest, but I doubt it matters much)
<lain>
but things like rapidly scrolling get really laggy
<awygle>
my experience is X forwarding is always crazy slow
<lain>
hrm
<rqou>
worksforme(tm)
<lain>
some people say it's fast, some say it's slow
<lain>
I can't tell if the people who say it's fast just aren't doing whatever I'm doing
<lain>
or if I'm doing something wrong
<rqou>
although x forwarding from germany to the US was unusably slow
<rqou>
offtopic: what happened to all the cheap mellanox/chelsio 10g nics?
<rqou>
did people buy them all?
* awygle
raises hand
<awygle>
i bought one
<lain>
haha
<awygle>
hope it isn't just like... a bag of bees
<rqou>
argh, ebay crap is all mislabeled
<lain>
^
<rqou>
i'm trying to figure out what hardware i'm going to bring to 34c3
<rqou>
apparently i can get 40g mellanox cards for pretty cheap
<awygle>
rqou: define "pretty cheap". also new or used?
<rqou>
but i don't have 40g optics, and gruetzkopf told me that anything above 10g is "bring your own optics"
<rqou>
the problem right now is that i can't figure out which cards are supposed to be 10g cards and which cards are supposed to be 40g cards
<rqou>
mellanox has the most confusing product lineup ever
<rqou>
they have a crazy mix of IB and ethernet equipment
<awygle>
is it chelsio that has that iWARP thing?
<rqou>
no idea
<rqou>
azonenberg, lain (or anybody else who likes high performance networking): chelsio or mellanox for 10gbe? (intel is too expensive lol)
<lain>
no idea
<lain>
monochroma might know things
<awygle>
lmao the first two results for "chelsio vs mellanox" are great
<lain>
rqou: how do I get academic books for free? :P
<rqou>
the library? :P
<lain>
haha
<lain>
wasn't there some website that had papers and sometimes books?
<lain>
I'm blanking on the name
<rqou>
sci-hub?
<lain>
ittt was some russian site
<awygle>
libgen
<awygle>
?
<lain>
yeah that sounds right
<lain>
yeah, that's it
<lain>
thanks :P
<rqou>
alright, $20 for a mellanox connectx-2 with free shipping
<rqou>
hopefully it works
<rqou>
if not i'll pull the intel card from my desktop and take it to 34c3
<rqou>
gotta ftp all the things
<rqou>
someday i'll be one of "those guys" getting a 100g link at CCC :P
<awygle>
what is the purpose of all this networking equipment?
<rqou>
CCC ftp
<awygle>
i always hear about it re: CCC but i don't really get why
<lain>
we do what we must
<lain>
because
<lain>
we can
<rqou>
ccc has a ridiculously fast lan (and uplink too) for people to "share files"
<rqou>
but i'm "only" going to be bringing in a 10g link and a single 4tb hdd
<rqou>
no 100g + raid for me :P
<azonenberg>
lol
<azonenberg>
see, i plan on rolling out lots of fast networkign in the new house but it'll be for talking from PCs to FPGAs
<azonenberg>
Not for moving pirate media :p
<rqou>
i didn't say anything about pirate media :P
<awygle>
azonenberg: on that topic, is 10GBASE-T a) a thing and b) as simple vis-a-vis FPGAs as 10G (in that you can just run a sufficiently fast transceiver to it)?
<rqou>
a) yes b) no
<awygle>
k
<rqou>
10gbase-t is ridiculously complicated and everybody hates it
<azonenberg>
So
<rqou>
the transceivers are also really power hungry
<azonenberg>
10Gbase-T silicon is almost impossible to get in qty 1 w/o NDA
<azonenberg>
i consider it nonexistent
<azonenberg>
i havent found them anywhere
<azonenberg>
wherease 10Gbase-X SFPs can be interfaced directly via a single 10gbps GTP
<azonenberg>
or, if you're in a spartan/artix part
<awygle>
4x GTPs for XAUI, yes
<azonenberg>
four 3.125 Gbps GTPs and a XAUI converter chip
<awygle>
has anybody tried RXAUI? 2x 6.25 Gbps GTPs?
<azonenberg>
The silicon for baseT is power hungry
<azonenberg>
The noise margins are poor
<azonenberg>
you often need ECC to get good results (in the PHY, lol)
<rqou>
i saw a 10gbase-t connection IRL
<azonenberg>
i forget if its mandatory
<azonenberg>
You basically need shielded cat6
<rqou>
but it was using a silly TERA connector and everybody hated it
<azonenberg>
Latency goes through the roof because of all the DSP required to make sense of the signal
<rqou>
it also wasn't hooked up
<azonenberg>
Fiber has lower latency, lower power, can be used with a COTS FPGA and commodity transceiver/connector without any hard-to-find part
<azonenberg>
IMO, copper died after 1G
<azonenberg>
and everything is fiber from there on out
<rqou>
what about 2.5g/5g?
<rqou>
:P
<azonenberg>
Until i can get PHYs in single unit volume on digikey
<azonenberg>
without an NDA
<azonenberg>
it's dead to me
<azonenberg>
awygle: re RXAUI, not to my knowledge
<azonenberg>
that would be the perfect sweet spot for an artix7
<azonenberg>
But i dont think it exists
<awygle>
microsemi makes some PHYs, one of which is stocked at Arrow
<azonenberg>
for what, 10gbaseT?
<awygle>
RXAUI->10gbase-x
<azonenberg>
wait rxaui is a thing??
<awygle>
only at microsemi afaict
<azonenberg>
I could double the port count of my 10g projects this way
<azonenberg>
but realistically thats a massive bus to route
<awygle>
yes, that too
<azonenberg>
Not recommended
<rqou>
xgmii is dumb :P
<azonenberg>
But 2x RXAUI to 2x SFP
<azonenberg>
now that is something i'd like
<awygle>
you could do a 10G NIC with a 4x GTP Artix and the XGMII PHY
<azonenberg>
one gtp quad to two 10g interfaces
<rqou>
btw, azonenberg plz 2 plan brainstorming session :P
<awygle>
wow they got a lot of these in stock _since last night_
<azonenberg>
But can you get a datsheet?
<azonenberg>
thats the big holdup in my experience
<azonenberg>
i had been planning to use the TLK10232 dual XAUI - SFP
<azonenberg>
Which i have a datasheet for
<rqou>
just pirate a datasheet :P
<azonenberg>
and i got a bunch of samples courtesty of a friend at TI
<rqou>
look around HuaQiangBei :P
<awygle>
ah, you're right, NDA'd
<azonenberg>
So far i see a 3-page product brief at mouser
<awygle>
oh well, none of my ideas ended up using any of these anyway
<awygle>
just a cool thing
<awygle>
" After registering for a MyEthernetSolutions account with a verified NDA, you will have access to datasheets, application notes and other locked documents available at our individual product landing pages. "
<rqou>
wtf why does a part like this need an NDA?
<awygle>
seeeecrets
<azonenberg>
rqou: why does a 88e1111 need an nda?
<rqou>
right
<azonenberg>
and sure, i could be like lain and get an NDA
<rqou>
although that one is leaked
<awygle>
dammit i always forget to install mercurial when i set up to build yosys...
<azonenberg>
Thing is, i dont want to give my business to a company with that kind of practice
<awygle>
^
<azonenberg>
if you dont want my business, fine
<azonenberg>
i'll buy from a competitor
<azonenberg>
:p
<awygle>
depending on what you're doing i feel like a kintex is the way to go for 10G
<azonenberg>
and the DS is generally the authoritative source
<awygle>
i'm in DS182 now
<awygle>
version 2.16
* azonenberg
looks
<azonenberg>
Oh
<monochroma>
rqou: also note that some (read, most) vendors are super picky about which optics you use... even though they are standardized... they tend to not play nice with other vendors
<azonenberg>
Yeah this is updated since before
<azonenberg>
Older versions did not have this
<rqou>
monochroma: yeah, i've set the "ignore optics compatibility" bit in my intel cards
<azonenberg>
this changes a lot, you can now do 4x 10ge in a 70t
<rqou>
afaik mellanox has something similar
<rqou>
wait azonenberg is this the "not a metal heat spreader" version?
<awygle>
on a related note, fpga vendor documentation is pretty irritating. although at least it exists
<azonenberg>
rqou: yes
<azonenberg>
bare die flip chip
<azonenberg>
This changed very recently, i guess they requalified the existing chips
<rqou>
yeah, i thought the reason it wasn't "approved" for 10g was thermal
<azonenberg>
previously only the heat spreader packages were supported for 10G
<azonenberg>
no it was signal integrity
<rqou>
what
<rqou>
how would signal integrity be different?
<azonenberg>
The packages without heat spreaders had a different substrate with less layers
<azonenberg>
since they were meant for lower performance designs
<awygle>
something else worth looking at (although i nkow you're a xilinx shop) are the Cyclone 10 GXs
<rqou>
oh?
<rqou>
how do you know the substrate is different?
<azonenberg>
This was doucmented somewhere
<azonenberg>
iirc
<rqou>
wtf
<rqou>
but the pinout is identical
<azonenberg>
"Some FB/FBG and RB packages include V CCAUX_IO pins that are not utilized by the I/O pins are placeholders to ensure pin compatibility with FF/FFG/FFV and RF packages FF/FFG/FFV and RF packages, when the high-performance option is chosen for the..."
<azonenberg>
UG475 p31
<rqou>
huh
<azonenberg>
Presumably this is true for the GTPs too
<azonenberg>
more power/ground pins etc
<rqou>
hmm, so customers complained enough that xilinx recertified the parts?
<azonenberg>
Presumably, yeah
<azonenberg>
Anyway, my plan hasnt changed
<awygle>
the Cyclone 10 GXs have these crazy 6.6/12.5 Gbps dual mode transceivers and are pretty cheap as these things go
<azonenberg>
The 24-port switch will be an artix
<azonenberg>
Because i wanted a lot of 1G GTPs for 1G optics
<azonenberg>
and a lot of GPIOs for lots of RGMII interfaces
<awygle>
have you thought about running SGMII?
<azonenberg>
I was originally going to have a 7k160t as a backbone 10GE-only switch for super high performance stuff
<azonenberg>
Thought about, yes - but hard to do with 7 series
<azonenberg>
ultrascale is better for that
<azonenberg>
Anyway, for the next-gen switch design
<azonenberg>
i'm going to use an XCKU035 :D
<awygle>
yeah the IP core you can get from xilinx says "it's really hard to close timing on this" lol
<azonenberg>
Sixteen GTHs which can do 10G natively
<azonenberg>
Plus up to 520 GPIOs
<azonenberg>
Aaand
<rqou>
also, the xilinx transceiver naming is super confusing
<azonenberg>
in ultrascale
<azonenberg>
The normal GPIOs can do SGMII :D
<azonenberg>
And 1000base-X
<azonenberg>
and with 440K logic cells of ultrascale i should be able to fit a lot of switch fabric
<awygle>
i was wondering whether 1000base-x worked like 10gbase-x. sounds like yes
<azonenberg>
That board would probably have 16 10G optics, then maybe 24 1G optics and another 24 1G copper ports or something?
<awygle>
of course there's the minor issue of the FPGA costing 1200$
<azonenberg>
it'd be easily a 2U or more
<azonenberg>
Yes but if i'm doing a 16-layer PCB
<awygle>
i would do 8 10G and 2 40G probably
<azonenberg>
with probably ViP and controlled impedance
<rqou>
btw azonenberg, thought on the Octavo SIP devices?
<azonenberg>
i really dont care about the cost of the FPGA
<rqou>
*thoughts
<azonenberg>
the PCB will dominate for O(1) production volume
<azonenberg>
rqou: not familiar with them?
<azonenberg>
awygle: yeah specifics TBD
<awygle>
boards are not _that_ expensive
<azonenberg>
thats just a firmware diff anywy
<azonenberg>
awygle: Single unit volume for 16 layers with controlled impedance and ViP
<azonenberg>
and a PCB that's probably 16" wide x 8" deep?
<awygle>
azonenberg: wouldn't you have to rerun the tracks?
<rqou>
azonenberg: some company took the AM335x and put it into a SIP with some ram and all the pmic stuff
<azonenberg>
oh that
<azonenberg>
yes
<azonenberg>
it looks cool but i dont have an immediate use
<azonenberg>
awygle: Plus assembly since i am not going to run that in my toaster oven
<azonenberg>
awygle: that is easily a $2000 PCB including NRE
<azonenberg>
Bare
<azonenberg>
Plus assembly and parts
<rqou>
azonenberg: i'm overall not _super_ happy with the octavo sip
<rqou>
mostly because i don't like the AM335x very much
<azonenberg>
So a $400 FPGA to a $1200 FPGA doesn't really change the total project budget by more than 20% or so
<awygle>
eh okay, i'd say it's pretty arguable. i'm not gonna do a multi-K project regardless of the constant factor anytime soon anyway
<rqou>
i'd like to see a Zynq SIP
<azonenberg>
rqou: me too
<awygle>
last thought, if you do SGMII do you need 16 layers?
<rqou>
or, for something more foss-friendly, an i.mx6 SIP
<azonenberg>
8+ layers, i havent figured it out yet
<azonenberg>
if i added some QDR-II+ etc i'd need probably 12+
<azonenberg>
awygle: I intend to start out with the 24+2 port switch
<azonenberg>
I did a prototype layout of that in a backplane form factor on 8 layers but never finished the ram
<azonenberg>
in order to home assemble this
<awygle>
yeah i found that in the logs this morning
<azonenberg>
i'm probably going to split it into multiple boards
<azonenberg>
probably 2-3 line cards full of KSZ9031s made on oshpark
<azonenberg>
then one brain card with the FPGA and SFPs
<azonenberg>
made at multech, but fairly small
<azonenberg>
This avoids the yield issues with doing a huge board in a homebrew reflow process
<awygle>
yes, also probably saves you on the fab in several axes
<rqou>
heh, huge boards have yield issues even on professional assembly houses :P
<rqou>
e.g. the thing my father worked on that had 5 virtex-5s
<cr1901_modern>
Well actually, this is prob the best scene in The Simpsons just for how relatable it is...
<awygle>
there's a huge lag between clicking to "drop" something and it actually being released from mouse tracking... wonder if that's kicad or this admittedly rather underpowered computer
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<qu1j0t3>
cr1901_modern: Ohhh that is so good. That scene speaks to me too. An absolute classic
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<awygle>
Kicad progress - in 3 hours I created 1/4th of a component and submitted a bug fix
<cr1901_modern>
Sounds about right
<balrog>
awygle: schematic or part?
<balrog>
I usually use a third party component generator script :|
<awygle>
Schematic symbol
<awygle>
I was playing with kipart as well as doing it manually, just trying stuff
<azonenberg>
i have never had problems creating components
<azonenberg>
only large BGAs take time, to name all of the pins
<azonenberg>
if you dont have a good machine readable source for the pins
<awygle>
i found that i couldn't copy and paste between different "units" of the symbol
<awygle>
they were pasted to the unit they were copied from, not the current unit
<azonenberg>
Huh
<azonenberg>
I generally dont do that
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<steph881>
▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄ DID YOU GUYS KNOW TODAY WAS NIGGERS DAY?? SAY HI TO YOUR FAVORITY NIGGER IN #FREENODE!! quicktalkeh676te.onionkpbvtamo: seu Bike jeandet sn00n balrog m_w bibor nurelin eduardo__ wolfspraul rqou scrts Xark xdeller grantsmith _whitelogger UmbralRaptor lain teepee pie__ azonenberg th
<steph881>
▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄▄ DID YOU GUYS KNOW TODAY WAS NIGGERS DAY?? SAY HI TO YOUR FAVORITY NIGGER IN #FREENODE!! quicktalkeh676te.onionlyqxgxo: moho1 felix_ Marex nurelin promach SuperChickeNES brizzo Ishan_Bansal openfpga-bb sn00n dx lexano gruetzkopf dig
<azonenberg>
i usually either have every unit the same, for e.g. a multi transistor package
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<azonenberg>
or have them totally different, like for an FPGA
<azonenberg>
Also, wow spam
<azonenberg>
Don't see much of that here
<oeuf>
Ꙩ_ꙩ
oeuf is now known as egg|zzz|egg
<egg|zzz|egg>
flashy spam too
<balrog>
there's been a spam campaign across freenode
<balrog>
and efnet
<egg|zzz|egg>
saw some of that crap on esper too
<balrog>
ugh
<egg|zzz|egg>
balrog: you're in #principia, right? you might have encountered some of it there too iirc
<awygle>
azonenberg: for an fpga i usually will copy/paste a bank and change the names/pins
<balrog>
yeah I am. don't think I saw it there though, been afk a lot
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<pie__>
damn lol that charge pump kill trick
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<pie_>
wtf is with my wifi
<Zorix>
you didnt pay for the wifi package with your isp
<jn>
maybe your router was pwned and is now sending irc spam ;)
<pie_>
yeh
<pie_>
this has been going for weeks though
<Zorix>
have to pay your isp an additional $9.99 plus tax and service charge and convenience fee for wifi performance package, you even get 100 mb towards your streaming service for free
<Zorix>
for the first 6 months
<Zorix>
$14.99 after that
<Zorix>
but if you sign up before 12/31/17 your $19.99 activation fee is waived
<pie_>
jn, i wish talk gives would repeat the questions
<pie_>
this talk is the difference between halfassed reversing and proper :/