<sorear> are gecko feet mechanical?
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<swetland> oh that was a duuuuuumb bug
<swetland> program memory is multibanked and synchronous, so part of ins_rd_addr is decoded into chip select... which is great to initiate the read
<swetland> but on the following cycle when the right data needs to be routed into ins_rd_data, well.... not so good
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<SolraBizna> I can't wait until my core gets used with external memory and I have to worry about things like that D:
<swetland> oh this was just on-chip bram!
<swetland> for some reason I tossed in multiple banks up front just because
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<SolraBizna> I avoided that so far by having the memory and IO devices clocked on the rising edge, and the logic clocked on the falling edge
<SolraBizna> like on the 65xx bus
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<_whitenotifier> [Glasgow] marcan commented on pull request #82: revC: length match LVDS pairs - https://git.io/fpgFp
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<_whitenotifier> [whitequark/Glasgow] marcan pushed 1 commit to master [+0/-0/±1] https://git.io/fpgFh
<_whitenotifier> [whitequark/Glasgow] q3k bad3e59 - revC: length match LVDS pairs (#82)
<_whitenotifier> [Glasgow] marcan closed pull request #82: revC: length match LVDS pairs - https://git.io/fpE4I
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<_whitenotifier> [whitequark/Glasgow] marcan pushed 4 commits to master [+0/-0/±8] https://git.io/fpgAL
<_whitenotifier> [whitequark/Glasgow] marcan 5288648 - revC: swap U2/U3, fix DRC issue
<_whitenotifier> [whitequark/Glasgow] marcan 422462c - revC: pull +5V a bit further away from GND
<_whitenotifier> [whitequark/Glasgow] marcan aa64dad - revC: add ATECC508A
<_whitenotifier> [whitequark/Glasgow] marcan 5a3ec2e - revC: update wave soldering keepouts
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<_whitenotifier> [whitequark/Glasgow] marcan pushed 1 commit to master [+0/-0/±1] https://git.io/fpgAB
<_whitenotifier> [whitequark/Glasgow] marcan 1473145 - revC: update wave soldering keepouts
<_whitenotifier> [Glasgow] marcan closed issue #75: Add a footprint for an ATECC chip - https://git.io/fp8iv
<_whitenotifier> [Glasgow] marcan commented on issue #75: Add a footprint for an ATECC chip - https://git.io/fpgAu
<_whitenotifier> [Glasgow] marcan commented on issue #68: Expose on-board I2C for accessories - https://git.io/fpgAz
<_whitenotifier> [Glasgow] marcan commented on issue #68: Expose on-board I2C for accessories - https://git.io/fpgA2
<_whitenotifier> [Glasgow] whitequark commented on issue #68: Expose on-board I2C for accessories - https://git.io/fpgAr
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<_whitenotifier> [Glasgow] marcan commented on issue #68: Expose on-board I2C for accessories - https://git.io/fpgA5
<_whitenotifier> [Glasgow] marcan commented on issue #68: Expose on-board I2C for accessories - https://git.io/fpgAF
<_whitenotifier> [Glasgow] whitequark commented on issue #68: Expose on-board I2C for accessories - https://git.io/fpgxv
<TD-Linux> exposing the i2c is a bit obnoxious as it skips applets, and also putting the wrong thing on those pins screws up the whole of glasgow
<whitequark> yes
<whitequark> that's another reason i don't do it
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<_whitenotifier> [whitequark/Glasgow] marcan pushed 1 commit to master [+0/-0/±2] https://git.io/fp2el
<_whitenotifier> [whitequark/Glasgow] marcan b50bd69 - revC: fix up diffpairs
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<_whitenotifier> [whitequark/Glasgow] marcan pushed 1 commit to master [+0/-0/±1] https://git.io/fp2eX
<_whitenotifier> [whitequark/Glasgow] marcan ec5f4da - revC: fix some more diffpair issues
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<tnt> Now I just need to come up with tests for all thoses cases : https://github.com/smunaut/nextpnr/commit/2c519760579100144008b4e0fbc66959894ea002 :p
<tnt> this definitely turned out a bit more complex that I had originally imagined :/
<daveshah> ice40 PLLs are really horrible tbh
<daveshah> Thanks for your work on this!
<tnt> Heh np, happy to help :)
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<tnt> I swear everytime I submit I PR, I manage to screw up something somewhere in the process ...
<qu1j0t3> :)
<tnt> So many steps to extract one commit from my work tree and rebase and ... and I'm bound to fuck up one of them.
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<tnt> daveshah: tx for the quick review ;)
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<pie_> well this exists but its all paid stuff https://www.esda.org/standards/esda-documents/
<pie_> not that i really want to start reading some huge ESD standard
* pie_ googles around some more
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<pie_> im leafing around in our copy of the art of electronics and its really hard to decide where to start reading :D
<qu1j0t3> pie_: Don't forget Kuphaldt.
<pie_> qu1j0t3: hm thats an ida
<pie_> idea
<qu1j0t3> i read just about all of his books on my ereader, e.g. while taking the bus...
<qu1j0t3> yeah, that's true, some are incomplete. but the earlier, tutorial books are complete
<qu1j0t3> and he's a good writer.
<pie_> lmao "How not to seal conduit on a pressure transmitter" http://www.ibiblio.org/kuphaldt/socratic/sinst/doc/bad_xmtr_sealant.jpg
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<pie_> azonenberg_work: see above
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<_whitenotifier> [whitequark/Glasgow] whitequark pushed 3 commits to master [+1/-0/±2] https://git.io/fpaCL
<_whitenotifier> [whitequark/Glasgow] whitequark e0c6f86 - cli: build: fix a confusing message.
<_whitenotifier> [whitequark/Glasgow] whitequark d4fedf0 - gateware.fx2: implement reset for async FIFOs.
<_whitenotifier> [whitequark/Glasgow] whitequark a91aa09 - arch.lpc: new definitions.
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<SolraBizna> it should be possible to search for the first time a specific signal has a specific value in GTKWave, but I can't figure it out
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<whitequark> daveshah: Info: Max frequency for clock 'sys_clk': 41.31 MHz (PASS at 30.00 MHz)
<whitequark> Info: Max frequency for clock 'lpcmonitorapplet_lclk_i_$glb_clk': 35.31 MHz (PASS at 33.33 MHz)
<whitequark> with the global promotion fix I get *significantly* better timing
<whitequark> in almost all applets
<daveshah> Very nice
<zkms> uwaa nice
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<sorear> 41 MHz on the up5k?
<whitequark> yeah
<sorear> istr that was considered out of reach for a long time, nice
<whitequark> well, nextpnr is pretty good, and also my gateware is pretty good, too :P
<daveshah> Well it depends what you are doing
<whitequark> i used to barely clear 30 MHz iirc
<daveshah> From memory a simple UART controlling LEDs that is one of our icebreaker demos hits a bit over 50MHz
<zkms> my smol gmsk modulator works up to like 127MHz with nextpnr on ice40 8k
<whitequark> 8k is much faster
<whitequark> daveshah: yeah but an fx2 arbiter is quite a bit more complex
<daveshah> Yeah, it must be well designed to manage that
<daveshah> hx8k is round about 3x faster than up5k
<whitequark> daveshah: i had to use registers in pads
<whitequark> registered tristates...
<whitequark> while meeting the weird fx2 timings
<whitequark> it was not trivial
<daveshah> I can imagine
<TD-Linux> any tips on converting a systemverilog design to yosys compatible verilog?
<daveshah> Improve the SV support in Yosys /s
<daveshah> I think in general the two things you'd need to remove are structs and enums
<TD-Linux> unironically one option (well also improve either verilator or icarus)
<daveshah> Yosys supports interfaces to some extent already
<swetland> verilator supports structs, enums, typedefs, interfaces, modports
<TD-Linux> oh cool. I'll run this though verilator first and then find the set that verilator supports and yosys doesn't
<swetland> I think enums, typedefs, and structs are the significant features missing from yosys
<daveshah> yes, that sounds about right
<swetland> there's at least two issues opened where folks have started hacking on support for them but not gotten to a submitable state
<TD-Linux> does always_* just get turned into always?
<daveshah> Yes
<daveshah> I'm not sure if this was fixed but for a long time logic was just converted to reg too
<swetland> both verilator and yosys recognize 'em but yeah I don't think they do any checking or enforcement
<daveshah> And Yosys doesn't really care for reg/wire interchange
<whitequark> daveshah: any chance you could add another global promotion option? for CE
<whitequark> same problem as logic
<whitequark> daveshah: also, do you think you could add a log message that would indicate the fanout of an inferred SB_GB
<whitequark> ?
<zkms> is there a way you can ask nextpnr what the SB_GBs are assigned to?
<whitequark> it prints that in the log
<whitequark> but... it's usually $abc$screwyou
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<whitequark> daveshah: probably gonna do it myself, hm