10:08 <acathla> What does "BE" in last_BE stand for?

10:17 <acathla> _florent_?

12:09 <_florent_> acathla: it's used to indicate the last valid byte of the 32-bit word

17:37 <Xiretza> what exactly is up with mem_decoder() only supporting 31 bit addresses? it was introduced in https://github.com/enjoy-digital/litex/commit/740629ba53944fc04fca79e433508a67cfe0f02f#diff-5b5aa398d41ddd6086fbe51e97931f5cR97, with not much explanation (the target address is masked with 0x7FFF_FFF, so any MSB will match with 32-bit addresses).

17:37 <tpb> Title: soc_core: remove 256MB mem_map limitation · enjoy-digital/litex@740629b · GitHub (at github.com)

18:42 <_florent_> Xiretza: thanks for reporting, it was here because we were using a shadow_base of 0x8000000 before, but this should have indeed be removed when removing the deprecating the shadow_base

18:43 <_florent_> Xiretza: this is fixed with https://github.com/enjoy-digital/litex/commit/16d1972bf81f43840a74e37fee3f5107e6b0504c

18:43 <tpb> Title: integration/common: fix mem_decoder (shadow base has been deprecated) · enjoy-digital/litex@16d1972 · GitHub (at github.com)

18:44 <Xiretza> _florent_: ah, interesting! I hadn't actually tested it yet, but while playing around with the liteeth standalone generator and trying to make it fit into my addressing scheme, I couldn't help but wonder how this was ever *supposed* to work ;) glad to see it fixed

18:45 <levi> _florent_: BTW, I had been using litex_buildenv which isn't quite up-to-date with the main litex repos; I finally got my board definition working with the bare litex environment, but it was still having ethernet issues that I have not fully tracked down. But I can confirm that ISE really doesn't like the auto-added "keep" attributes when constraints are added; I had to remove that to get past the packing phase.

18:47 <_florent_> Xiretza: yes sorry, the code in master is a bit messy since has evolved a lot without rewrite. I'm rewritting things in the new_soc branch to have something easier to understand and retro-compatible

18:49 <_florent_> levi: interesting, feel free to open an issue with your platform/target so that i can look and try to find a way to avoid the workaround

18:51 <levi> It's a custom board that no one else is likely to have, but I noticed that you commented on a similar issue occurring in the open PR at litex_buildenv where they're trying to migrate to newer litex.

18:52 <levi> That's how I got the idea of how to remove the "keep" attribute in the first place.

18:55 <_florent_> levi: ah ok, i thought this was the issue from the PR :)

19:07 <levi> Where it showed up in my board is that I need to route the xtal input through the FPGA and out to the xtal input of the ethernet phy. I have no idea why the board was done this way. It works fine without "keep" but with it there's always some complaint because keep implies NOMERGE. And ISE also complains that the "keep" attributes are not applicable to primary ports, so I figured it was safe to remove.

19:09 <levi> No rush to resolve this or anything, just wanted to add some info about what was going on with my board in case it might provide more context to the larger issue.