_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<r4d10n> hello folks... just trying out litex picorv32 etherbone demo code on colorlight 5a-75b...
<r4d10n> the gateware gets jtagd just fine... i'm getting blinky working... i'm not sure i'm loading the BIOS along with it...
<r4d10n> after setting up lxterm udp, RemoteClient fails to connect to etherbone and says socket connection timeout
<tpb> Title: targets/colorlight_5a_75b: switch to SoCCore, CPU and Etherbone worki… · litex-hub/litex-boards@dcc65b3 · GitHub (at github.com)
<r4d10n> should i do anything to flash the BIOS "software" code seperately ?
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<gregdavill> sajattack[m]: Are you still having issues with your framebuffer?
<gregdavill> I ended up pivoting, and created an LCD wrapper to display the LiteVideo.Terminal. https://github.com/enjoy-digital/litevideo/tree/master/litevideo/terminal
<tpb> Title: litevideo/litevideo/terminal at master · enjoy-digital/litevideo · GitHub (at github.com)
<gregdavill> When that was working, I created a module that accepts a character stream, it emulates enough wishbone operations to display these charaters on the terminal.
<gregdavill> I had to alter the Terminal module a little to enable read-back from the character memory, this was needed to implement scrolling when we encounter a newline.
<gregdavill> Then it's all hooked up to the SoC as if it's a standard LiteUART module.
<sajattack[m]> oh ok
<sajattack[m]> the part I'm having trouble with is vga
<sajattack[m]> so maybe you won't be able to help
<sajattack[m]> but my hsync is going super slow when it's trying to output the framebuffer, and then about regular speed during blanking
<sajattack[m]> gregdavill: ☝︎
<gregdavill> Well I think I might have been seeing the same thing when I tried adding a LiteVideo framebuffer to the hadbadge.
<gregdavill> It also appeared to make linux run about 1/2 the speed. While it (the framebuffer) was also not working correctly. :(
<sajattack[m]> yeah I think maybe there's an sdram or cpu bottleneck
<sajattack[m]> I wonder if there's any board it actually works on
<gregdavill> Yea, I think all the official platforms for LiteVideo are using DDR2/3 memory.
<sajattack[m]> oh, that could be it, yeah
<sajattack[m]> when I suggested to _florent_ it could be an sdram bottleneck he didn't think so because increasing my pixelclock increased my hsync.
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<sajattack[m]> I could fit a 320x240 framebuffer in block ram
<gregdavill> Are you actually getting more pixels between hsync pules when you do that?
<sajattack[m]> I don't know
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<gregdavill> FYI this is my WIP. It's not currently a full framebuffer, it only displays the Litex/Linux console.
<tpb> Title: GitHub - gregdavill/linux-on-litex-vexriscv at hadbadge-flash (at github.com)
<gregdavill> And that is paired with this small change to LiteVideo: https://github.com/gregdavill/litevideo/tree/terminal-readback
<tpb> Title: GitHub - gregdavill/litevideo at terminal-readback (at github.com)
<sajattack[m]> Thanks
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<pdp7> gregdavill: hi! it's been exciting to see your experiments with hadbadge video on twitter
<pdp7> I'll try the latest on your hadbadge-flash branch
<gregdavill> The latest there drops the USB serial port. But adds the console on the badge LCD
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<pdp7> any one have any ideas about this error?
<pdp7> File "./make.py", line 452, in <module>
<pdp7> main()
<pdp7> File "./make.py", line 413, in main
<pdp7> Traceback (most recent call last):
<pdp7> soc.add_framebuffer(video_settings)
<pdp7> File "/home/pdp7/dev/enjoy/linux-on-litex-vexriscv/soc_linux.py", line 218, in add_framebuffer
<pdp7> from dma import StreamReader, StreamWriter
<pdp7> ModuleNotFoundError: No module named 'dma'
<tpb> Title: Use LCD on hadbadge from Linux · Issue #44 · litex-hub/litex-boards · GitHub (at github.com)
<pdp7> I'm trying to use Greg's branches to use LCD on hadbadge
<pdp7> Is there supposed to be a dma module?
<pdp7> turns out I just needed to comment it out
<tpb> Title: Use LCD on hadbadge from Linux · Issue #44 · litex-hub/litex-boards · GitHub (at github.com)
<pdp7> LiteX BIOS and Linux boot on the LCD screen now
<pdp7> well done greg
<r4d10n> pdp7: can you tell me how LiteX Bios is loaded typically to ECP5 ? Is it embedded in the bit/svf file or the bin has to be loaded separately ?
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<yehowshuaimmanue> Hello fellow litex community, I have been trying to use the DMA frontend for Litex and cannot seem to get it working.
<yehowshuaimmanue> I just wish to do a simple write to memory
<yehowshuaimmanue> I was able to do use getport() from the crossbar and do a simple write to memory in simulation via litex_sim, but the write didn’t work when I deployed to the ECP5
<yehowshuaimmanue> That is I originally wrote to the port directly, now I'd like to try through the DMA frontend
<yehowshuaimmanue> pdp7 when I checked the builder scripts like 4 months ago, its loaded into the svf
<yehowshuaimmanue> In fact, I don't think ecpbram was working back then - I'm not sure if the build scripts have changed since then
<yehowshuaimmanue> This is referring to the ECP5
<yehowshuaimmanue> Sorry, that should have been addressed to r4d10n since its r4d10n who asked the question
<pdp7> r4d10n: I think the BIOS is embedded but I am pretty new to LiteX
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<yehowshuaimmanue> Can somebody take a look at this DMA snipper?
<tpb> Title: write_dma.py · GitHub (at gist.github.com)
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* sajattack[m] uploaded an image: 20200222_110706.jpg (99KB) < https://matrix.org/_matrix/media/r0/download/matrix.org/bdSIrVHFcglVLMgTSLUpIfqT >
<sajattack[m]> :tada:
<sajattack[m]> * 🎉
<sajattack[m]> gregdavill: I don't really understand how you connected this to linux
<sajattack[m]> I guess gen.py
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<sajattack[m]> but it looks maybe usb-uart specific?
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