_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
tpb has quit [Remote host closed the connection]
tpb has joined #litex
Degi has joined #litex
zyp has joined #litex
ambro718 has quit [Ping timeout: 250 seconds]
Degi has quit [Quit: ZNC 1.6.6+deb1ubuntu0.2 - http://znc.in]
Degi has joined #litex
abeljj[m] has joined #litex
<abeljj[m]> Is this a good place to ask questions regarding usage of Litex?
<sajattack[m]> yup
<abeljj[m]> Can I use my own core written in system verilog to build an SoC?
<sajattack[m]> I'm not familiar with the process but SoCs are often built on top of outside CPUs written in verilog so I'd assume so
<abeljj[m]> I have been reading about chipyard before litex. Chipyard is tightly coupled to boom and rocket.
Degi_ has joined #litex
Degi has quit [Ping timeout: 246 seconds]
Degi_ is now known as Degi
<Finde> abeljj[m]: you can indeed, a number of others have been integrating their cores into litex recently
HEGAZY has joined #litex
HEGAZY has quit [Read error: Connection reset by peer]
HoloIRCUser1 has joined #litex
HoloIRCUser2 has joined #litex
HoloIRCUser has quit [Ping timeout: 246 seconds]
HoloIRCUser1 has quit [Ping timeout: 240 seconds]
scanakci has joined #litex
<_florent_> abeljj[m]: welcome, LiteX can be used to create SoC from the provided cores, but that's one of the use cases. Sometimes users don't want to use Migen/LiteX but just want reuse one of the core (LiteDRAM/LiteEth) generated as verilog, sometimes reuse existing Verilog/VHDL/Netlist/IPs and only use LiteX to ease creating the interconnect, we are trying to allow different approaches/methodologies.
HoloIRCUser2 has quit [Ping timeout: 246 seconds]
HoloIRCUser1 has joined #litex
ambro718 has joined #litex
ambro718 has quit [Client Quit]
scanakci has quit [Quit: Connection closed for inactivity]
rohitksingh has quit [Ping timeout: 260 seconds]
gregdavill has quit [Ping timeout: 246 seconds]
HoloIRCUser1 has quit [Read error: Connection reset by peer]
HoloIRCUser has joined #litex
peepsalot has quit [Quit: Connection reset by peep]
peepsalot has joined #litex
rohitksingh has joined #litex
disasm[m] has joined #litex
gregdavill has joined #litex
mfny has joined #litex
<mfny> Hello, I need a suggestion as to a Dev board with as full a support as possible for LiteX Linux, and by full support I mean as many peripherals on the board supported as possible..
<mfny> perhaps SD and Ethernet ?
<mfny> anyone here ?
HoloIRCUser1 has joined #litex
gregdavill has quit [Ping timeout: 246 seconds]
<tpb> Title: Nexys 4 DDR Artix-7 FPGA Trainer Board - Digilent (at store.digilentinc.com)
HoloIRCUser has quit [Ping timeout: 250 seconds]
<somlo> mfny: if you care about programming it with completely FOSS tools, the ecp5 versa 5g (lattice) might be a good alternative: https://www.latticestore.com/products/tabid/417/categoryid/59/productid/43172/default.aspx
<tpb> Title: Products (at www.latticestore.com)
<somlo> (no microSD card slot on the board, but it does have ethernet)