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<_florent_>
esden: hi, ok sorry, i just described a bit more the direction i was going to in https://github.com/litex-hub/litex-boards/issues/53, can you describe the use you will have for this target there and i'll make sure to go in this direction and revert the features you want/need.
<tpb>
Title: GitHub - icebreaker-fpga/icebreaker-litex-examples: Example litex Risc-V SOC and some example code projects in multiple languages. (at github.com)
<esden>
I don't know at the moment how to add a PLL at all. So not sure if I will need to revert anything or not. I might need a second clock domain for periphs at some point though too.
<esden>
It is all bit in flux still as I am learning things and figuring out how I want the example SOC to work. As well as the bigger and more elaborate demo soc that will be part of the TWANG game port to the icebreaker.
<esden>
All of that is after all mostly a way to show icebreaker users how they could build a soc themselves. :)
<esden>
But a good default with multiple features demonstrated on a real example is always a good idea. :)
<esden>
I will try to improve the generated documentation too. So that will likely flow back to the target in litex_boards.
<tpb>
Title: Documentation for iCEBreaker LiteX Riscv Example SOC iCEBreaker LiteX Riscv Example SOC documentation (at icebreaker-fpga.github.io)
<esden>
I will put together some broader information it the issue you opened. :)
<esden>
Will be useful for me too. :)
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<_florent_>
esden: ok, if you want it to be in synced with your example, that's maybe better i don't touch it too much. Maybe we should just get rid of JumpToAddressROM that should no longer be needed and allow building/using the BIOS from SPI Flash when not used with external software.
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<esden>
_florent_: yeah definitely. If the mini rom is not needed any more we should get rid of it. That will definitely simplify the example. :)
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