_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<futarisIRCcloud> I don't think the vexriscv compressed instructions have been fully tested / formally verified.
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<somlo> the various Rocket variants available in LiteX all support 'c', for whatever that's worth :)
<sajattack[m]> on a semi-related note, anyone have a vexriscv-compatible coremark?
<sajattack[m]> I can't get this one to build https://github.com/riscv-boom/riscv-coremark
<tpb> Title: GitHub - riscv-boom/riscv-coremark: Setup scripts and files needed to compile CoreMark on RISC-V (at github.com)
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<xobs> sajattack: we're using -imac in Betrusted's vexriscv implementation.
<xobs> Are there any available examples of multiple clock domains with verilator in litex? Something like a PLL implementation.
<sajattack[m]> because it's rust so you have to
<sajattack[m]> right?
<xobs> sajattack: kinda? we'll be making our own target files, so we could disable it if we wanted. But it really does generate much smaller code, so might as well.
<sajattack[m]> mm
<sajattack[m]> yeah I played with the rust-litex repo and it was kind of annoying to have to go into the vexriscv and enable the compressed isa
<_florent_> xobs: simulations with verilator have been mostly used on synchronous designs with a single clock, not sure i have an example with multiple clocks
<sajattack[m]> and I thought it might be a sensible default
<xobs> You could also just use `riscv32i-unknown-none-elf`, which doesn't get you atomic or multiply instructions either. But works on basically anything.
<sajattack[m]> fair
<sajattack[m]> now I'm trying to get coremark compiled with gcc and the build I found on github doesn't seem to like either 32bit or ima, not sure which
<xobs> _florent_: I see. I'm still trying to understand how verilator actually works, so I wasn't sure if I was missing anything. Thanks for the input.
<sajattack[m]> has anyone played with coremark?
<sajattack[m]> hmm, maybe I could try to compile it within linux? or is it even harder?
<sajattack[m]> I need a vexriscv-linux chroot :P
<sajattack[m]> cross compiling c is hard
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<somlo> sajattack[m]: I have coremark compiled for rv64gc (static binary), but I need to doublecheck if I cross-compiled it on x86_64 or just natively with riscv64-fedora
<somlo> I know for sure I had to cross-compile it for i586 (the "reference" pentium I used for comparison) :)
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<peepsalot> sajattack[m]: i got a new 32MB sdran for MiSTer off ebay, and it was the stickiest PCB i've ever handled. the whole inside of the antistatic bag was coated in liquid flux or something. works ok though
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<sajattack[m]> lol
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