_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<gregdavill> pdp7: sorry, internet dropped out for a moment there.
<gregdavill> It waits until you open a terminal because of how the uart is implemented.
<gregdavill> At a software level, the uart driver blocks if a small hardware FIFO in the uart system is full.
<pdp7> gregdavill: ah ok, thanks... however, I justed realized that when trytingt o boot with lxterm... it stalls at 0% on Image
<gregdavill> At a gateware level, in the usb_cdc (Communication device Class) we only remove data from the fifo and send it to the host when a connection has been opened.
<gregdavill> I saw the gh issue, yep. I'm not sure why that is. I'll likely have to do some debugging around the issue here.
<tpb> Title: Snippet | IRCCloud (at www.irccloud.com)
<pdp7> ah ok
<pdp7> I could be doing something wrong... it's been awhile since I did lxterm to load
<pdp7> because I've been using flash
<pdp7> it just seems odd that it is stuck on 0%
<pdp7> even if there was something wrong with Image i would expect to at least start loading it
<gregdavill> This is the first time the usb_cdc has been put into the master branch, so it might not be you. I think you're the only one who has actually run this code on hardware yet.
<gregdavill> I need to send _florent_ an OC, but I'm confined to my house for atleast another week, can't get out to the post office. :(
<pdp7> understandable
<pdp7> hope you are doing ok!
<pdp7> is your city on lockdown too?
<gregdavill> I think I'm fine, just precautionary for now.
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<gregdavill> I hope you're also doing ok.
<pdp7> yeah, no symptoms so far
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<pdp7> with your prebuilt bitstream that boots ok from flash... are there gpios that I can play with?
<gregdavill> No, unfortunately there are not. I'd kept it pretty minimal.
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<gregdavill> I need to try out the HDMI output on the OC I modded. I hope the DDR3 should provide enough bandwidth to get a framebuffer running. :)
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<pdp7> gregdavill: that would be exciting!
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<_florent_> pdp7: you are indeed the first one to test this on the OrangeCrab. I tried to merge things from greg's repos, but havent been able to test myself.
<_florent_> gregdavill: thanks for the offer, i'll also buy some OrangeCrabs from groupgets, but that could indeed be useful to have one before to improve the few points that are still open in the LiteX support and help merging/debugging things.
<pdp7> Ok thanks
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<mesco> Hey, has anyone had any success booting Litex Linux on the Nexys Video?
<mesco> I'm having trouble successfully booting
<tpb> Title: hastebin (at hastebin.com)
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<pdp7_> gregdavill: do you think I could my j-link with SWD adapter to load bitstream onto the crab? (since USB CDC lxterm load is not working)
<pdp7_> I have a j-link... I bought it to program nrf52 bootloader over swd but I think it also does openocd?
<dkozel> pdp7_: I found some stuff using a jlink to JTAG a Xilinx FPGA, I imagine generic JTAG should work with the ECP5 as well
<gregdavill> You might be able to, but that only replaces what the DFU bootloader does.
<gregdavill> Standard JTAG only updates the bitstream of the ECP5, which you already have.
<gregdavill> There is a JTAG mode on the ECP5 that can enable updating of the FLASH, but this is kind of slow via openocd.
<gregdavill> The standard JTAG interface can't write data into the DDR3 memory on the OrangeCrab. (It may be possible to setup in gateware.)
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<pdp7_> Ah ok
<pdp7_> gregdavill: thanks... I was just thinking of way I could load my own rootfs and kernel as i wanted to play with rgb led pwm and also pwms
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