<nickoe>
Why does the symbiflow-examples and symbiflow-arch-defs have different ways to "init" the dependenceis, as far as I can see both use conda stuff. The examples project uses miniconda directly while the arch-defs project has "make env" and does magic in there.
<nickoe>
can't the examples and arch-defs use the same shared install env?
<litghost>
They are the same under the hood in the sense that it downloads miniconda and creates an environment
<litghost>
You don't have to use the wrappers for setting up the env, and the other parts of the build system doesn't actually care how the environment is created
<litghost>
If you invoke cmake (for arch-defs) within an environment with the right dependencies, it should just "work"
<litghost>
Same more or less for symbiflow-examples
<nickoe>
I am just slightly confused by the simarilatires yet differences
<nickoe>
I am trying to see if I can get an example working for the basys3
<litghost>
If you want to simplest example, I would just follow the instructions from symbiflow-examples
<litghost>
That should work, we actually test those instructions in CI
<litghost>
If you want to try re-use a conda env, you might get off the beaten path a bit
<litghost>
But you should be able to re-use the environment if you wanted too
<nickoe>
running TARGET="basys3" make -C counter_test now
<litghost>
The idea in symbiflow-examples was to side step the firmware side to focus on the P&R side
<litghost>
I believe the litex demo is just the ethernet port
<litghost>
the arty and basys both use a similiar size fabric
<nickoe>
litghost: ah, pretty cool I was wondering a moment about that array in that progmem.v, but I guesssed it was some rom code.
<nickoe>
so in principle the litex exsample should aslo work wiht uart console?
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<litghost>
I also believe the arty has DDR, and the basys3 doesn't
<litghost>
But don't quote me on that
<nickoe>
probably
<litghost>
Ya, I just double checked
<litghost>
The whole idea behind the LiteX Linux SoC really relies on external DRAM
<litghost>
I bet you could finagle the Litex Linux SoC demo on the basys3, but you'd run out of BRAM really fast
<nickoe>
anyway, it looks like I could figure outhow to run the examples. I guess next step is to figoure out how to properly simulate the counter example and get the logic analyzer plots. Is it only gtk wave people use?
<litghost>
gtk wave only shows outputs I believe
<litghost>
verilator or iverilog is required to generate the waveforms
<nickoe>
litghost: I am pretty new to FPGA, although it was years back I learned some
<nickoe>
So first I need to get used to the workflow and actually plot some veriflog bits together.
<nickoe>
the examples site does not describe simulation
<litghost>
So pre-synthesis simulation definitely works. Post-synthesis and post-place and route simulation is hit or miss. We have an issue to improve the situation
<nickoe>
Can you please remind me what the real difference is? Do you get timging skew with post synth or something? I guess post synth must add some more details to the sim?
<litghost>
Pre-synthesis is in the abstract verilog machine, post-synthesis everything has been lowered to real FPGA primitivies
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<nickoe>
Some friends made some small modules they test with verilator tb
<nickoe>
so my idea was to try to plot those in a proper project
<litghost>
Post-place and route typically includes actually delays, but you can do without too
<nickoe>
actually wanted to do it in vivdo, but then I saw that vivado prjects were a mess in git, so I though I might just try symbiflow and see how far I can get.
<litghost>
Great, let us know how it goes!
<litghost>
FYI, vivado projects aren't too awful in git, but we are always excited to have people try out the toolchain
<litghost>
The key is to just re-create the project in tcl everytime
<nickoe>
yeah, that I also figured by some of the top hits on google, but just exporting it and such gave absolute paths to the verilog files and I sorta just gave up
<nickoe>
But just given tht symbiflow is fater to install,... if it works it works :D
<litghost>
:D
<nickoe>
and is FOSS sooo +++
<litghost>
Word of warning, QoR from symbiflow is going to be worse than Vivado, so don't push the critical path if you can avoid it
<nickoe>
This is for an SDR transmit only radio, I don't think that will be that demanding to the artix, but I don't reeallly know as I have littel experince with it.
<litghost>
Good luck!
<nickoe>
But the plan is just to pump stuff to an external DAC and get it to do what we want as a start.
<litghost>
That should definitely be doable
<nickoe>
but as I understand the toolchain, I could use the vivado pnr stuff if needed?
<litghost>
So we use yosys on for synthesis, and you can have yosys output an edif for consumption with Vivado PnR
<nickoe>
great
<nickoe>
it is getting late here, but I will try to give it a stab tomorrow agian