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<shapr>
ZipCPU: students asked if there's a docker image that has all the tools installed
<shapr>
might be a good thing for your tutorial
<ZipCPU>
shapr: Thanks for the suggestion!
<ZipCPU>
SymbioticEDA routinely creates Vagrant+VirtualBox images with all of the tools installed on them, but these are used when teaching the formal verification course. Those images come with a 90 day (?) license for the full Symbiotic EDA suite as well.
<ZipCPU>
I've thought about making a docker image, but ... know so little about what would be required to do so that I haven't even tried starting
<shapr>
fair enough
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<sxpert>
ZipCPU: care to help a beginner ?
<ZipCPU>
Sure, I could use a distraction, what's up?
<sxpert>
ZipCPU: I suppose warnings of the "blah is not used" (because it's not implemented yet) are not a problem
<ZipCPU>
sxpert: Let me show you how to get rid of them ...
<ZipCPU>
At the bottom of your design, but before the endmodule, insert the following lines:
<ZipCPU>
/ Verilator lint_off UNUSED
<ZipCPU>
wire [N-1:0] unused;
<ZipCPU>
assign unused = { all of your unused nets};
<ZipCPU>
/ Verilator lint_on UNUSED
<ZipCPU>
You'll need to adjust N to the number of unused wires you have
<ZipCPU>
The neat thing about this is that, now when you use some of the bigger tools, they'll warn you about having an unused wire named: unused
<ZipCPU>
You can then quickly ignore that warning and go onto any others
<sxpert>
ZipCPU: I have something wierd line 142, it says RSTK is not used, but it is at various locations
<ZipCPU>
I just searched your design for RSTK
<ZipCPU>
It appears to be unused
<ZipCPU>
You reset it to zero, but then do nothing more with it
<ZipCPU>
There's some code referencing it, but it appears to be commented out
<sxpert>
I do assign things to it on line 783
<sxpert>
(the contents of PC)
* ZipCPU
looks
<ZipCPU>
Can you update the github file, so I can see the updates you've made?
<sxpert>
push done
<sxpert>
(sorry)
* ZipCPU
clones hp_saturn
<ZipCPU>
Line 873 should have two /'s, not just one--same for line 876
<sxpert>
ah, irc ate the first / ;-)
<ZipCPU>
You'll also need to adjust the N and the {} lines ... since you hadn't done that, I commented the two out
<ZipCPU>
Wow, that is one giant state machine
<ZipCPU>
I'm not sure line 306 is right, the case for READ_ROM_STA etc...
<ZipCPU>
Several tools have required I use a "begin end" on an empty case
<sxpert>
ah
<ZipCPU>
Line 438 too
<sxpert>
I can add that no pb
<sxpert>
(there are a bunch of those)
<ZipCPU>
Does anything reference RSTK? Or is it set only?
<sxpert>
it will be used when I get to implement the RTN* instructions
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<ZipCPU>
Sure, but then it's an unused register
<ZipCPU>
It's not that it isn't set, it's just unused
<daveshah>
Also, note the entire design will be optimised away for similar reasons
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<sxpert>
ZipCPU: ah, ok, that's what it means
<daveshah>
Because it has no outputs (other than one that is at a constant value)
<sxpert>
so I should connect say the leds, and show parts of a different register at each clock or something ?
<daveshah>
Yes, that would be a good solution
<sklv>
hi, i need an application which does RW on at least 2 sd cards at the same time, drives an oleds102 spi display, and transfers data over an rs232 port - i am trying to estimate whether this is withing my capability to implement with a verilog mcu - are there any examples of a boards where a yosys soft cpu runs code from external flash?