cr1901_modern has quit [Ping timeout: 268 seconds]
cr1901_modern1 has quit [Client Quit]
cr1901_modern has joined ##openfpga
Maya-sama has quit [Quit: Leaving]
rombik_su has joined ##openfpga
Maya-sama has joined ##openfpga
Maya-sama is now known as Miyu
Miyu is now known as hackkitten
m4ssi has joined ##openfpga
freeemint has joined ##openfpga
Stary has quit [Ping timeout: 264 seconds]
Stary has joined ##openfpga
freeemint has quit [Ping timeout: 276 seconds]
Zorix has quit [Ping timeout: 264 seconds]
Zorix has joined ##openfpga
freeemint has joined ##openfpga
carl0s has joined ##openfpga
emeb has joined ##openfpga
q3k has quit [Ping timeout: 252 seconds]
q3k has joined ##openfpga
uovo has joined ##openfpga
oeuf has quit [Ping timeout: 240 seconds]
m4ssi has quit [Remote host closed the connection]
OmniMancer has quit [Quit: Leaving.]
Jibz has joined ##openfpga
Jibz has quit [Client Quit]
Jibz has joined ##openfpga
mumptai has joined ##openfpga
Jybz has quit [Ping timeout: 276 seconds]
Jibz has quit [Client Quit]
Jybz has joined ##openfpga
tmeissner has joined ##openfpga
<rvense>
does anyone know if there are differences between the logic blocks in the ice40 hx8k and the ul5n? if i have a design that works at a certain speed in an hx8k, is it reasonable to expect the same performance in an ul5n?
<rvense>
up5k i mean
<whitequark>
rvense: absolutely not, up5k is probably the slowest FPGA currently on market
<whitequark>
and it is very, very slow in absolute terms too
<rvense>
booh!
<tnt>
The "Ultra" is "Ultra Low Power" :)
Jybz has quit [Ping timeout: 240 seconds]
<daveshah>
In particular, static power
Asu has joined ##openfpga
<daveshah>
Something like 75uA which is at least an order of magnitude better than alternatives even on a per LUT basis
<rvense>
yes, i suspected that meant they were different
freeemint has quit [Ping timeout: 245 seconds]
freeemint has joined ##openfpga
freeemint has quit [Ping timeout: 268 seconds]
freeemint has joined ##openfpga
VV01fzb has joined ##openfpga
rombik_su has quit [Quit: Leaving]
VV01fzb has quit [Remote host closed the connection]
mumptai has quit [Quit: Verlassend]
<ZirconiumX>
Gotta love it when you write a program to calculate the LUT bits from some bitstreams and then find out the LUT bits appear to be in different places in different synthesis runs
<ZirconiumX>
And that despite being told by somebody else's program that things were nice and there was a nice 1:1 mapping, your own program says there are quite a few more possibilities
<ZirconiumX>
(Mistral lives)
<daveshah>
LUT permutation by any chance?
<ZirconiumX>
Maybe, but I don't know how to account/correct for that
<daveshah>
I think you should be able to reverse engineer it from the routing back annotation
<ZirconiumX>
That's probably not going to be feasible to scale
<daveshah>
Then, try and find the setting to turn it off
<cr1901_modern>
Why is LUT permutation a thing?
<daveshah>
Because it adds a free KxK crossbar in front of the LUTs
<daveshah>
Therefore you can get away with sparser routing matrices
<daveshah>
And/or you can put critical signals on faster lut inputs
<cr1901_modern>
I don't think I follow, but I'll have to file away that q for later
<ZirconiumX>
daveshah: So I can't find any way to disable LUT permutation