ZirconiumX has quit [Quit: Love you all~]
rohitksingh has joined ##openfpga
zng has quit [Quit: ZNC 1.7.2 - https://znc.in]
zng has joined ##openfpga
ZirconiumX has joined ##openfpga
<Finde> they even said they're setting up a foundation
<Finde> not sure how it would then be vaporware
<Finde> they came to the DARPA POSH integration exercise specifically to talk about it, they're serious
pakesson_ has quit [Ping timeout: 240 seconds]
pakesson_ has joined ##openfpga
Maylay has quit [Ping timeout: 265 seconds]
Maylay has joined ##openfpga
Bike has quit [Quit: Lost terminal]
zng has quit [Quit: ZNC 1.7.2 - https://znc.in]
zng has joined ##openfpga
brrrrian has quit [Remote host closed the connection]
Jybz has joined ##openfpga
____ has joined ##openfpga
<keesj> cyrozap: thankt for the links, interesting
Jybz has quit [Quit: Konversation terminated!]
m4ssi has joined ##openfpga
X-Scale` has joined ##openfpga
X-Scale has quit [Ping timeout: 265 seconds]
X-Scale` is now known as X-Scale
rohitksingh has quit [Ping timeout: 246 seconds]
Asu has joined ##openfpga
zignig has quit [Ping timeout: 268 seconds]
m4ssi has quit [Remote host closed the connection]
Degi has joined ##openfpga
emeb has joined ##openfpga
____ has quit [Quit: Nettalk6 - www.ntalk.de]
nickjohnson has quit []
nickjohnson has joined ##openfpga
azonenberg_work has quit [Ping timeout: 265 seconds]
ZombieChicken has quit [Ping timeout: 268 seconds]
ZipCPU has quit [Remote host closed the connection]
ZipCPU has joined ##openfpga
genii_ has joined ##openfpga
genii_ has quit [Client Quit]
genii has joined ##openfpga
rohitksingh has joined ##openfpga
<cyrozap> Finde: I've just seen a lot of "we're going to open source our product/core technologies" announcements over the past decade or so, and an unfortunate number of them have ended up being false as the companies realize they can get the PR benefits of open-sourcing with none of the drawbacks. As the saying goes, "talk is cheap".
<pie_[bnc]> emily: flokli commented <cyrozap> https://twitter.com/RSNikhil/status/1224406889875824642
<cyrozap> While it _seems_ that Bluespec is being genuine here (and I certainly hope they are!), it wouldn't surprise me if it turns out their repo is never "ready enough" for public release, or the legal stuff to set up the foundation "falls through", or they just stop responding to queries about the open-sourcing.
<cyrozap> > we want to do a bit more testing before broadcasting the link; hopefully in a few days
<cyrozap> > hopefully in a few days
azonenberg_work has joined ##openfpga
<cyrozap> A few days can easily turn into a few weeks, months, years, or millenia, so I try not to get my hopes up for these kinds of things.
<cyrozap> Remember when Intel said they were going to publicly release the Thunderbolt specs? https://newsroom.intel.com/editorials/envision-world-thunderbolt-3-everywhere/
<cyrozap> May 24, 2017
<nats`> pepperidge farmer does ? :D
<cyrozap> > In addition to Intel’s Thunderbolt silicon, next year Intel plans to make the Thunderbolt protocol specification available to the industry under a nonexclusive, royalty-free license. Releasing the Thunderbolt protocol specification in this manner is expected to greatly increase Thunderbolt adoption by encouraging third-party chip makers to build Thunderbolt-compatible chips.
<cyrozap> It's February 5, 2020, and Intel is still the only Thunderbolt transceiver manufacturer.
<sorear> cyrozap: the spec release happened last year, marketing did a last-minute rename to "USB4"
<cyrozap> sorear: The TB3 backwards-compatibility of the USB4 specs is just "see the TB3 specs"--there's no information on how any of it works.
<cyrozap> *backwards-compatibility section
<pie_[bnc]> cyrozap: welllllll ghidra did happen eventually
<daveshah> and rereleased RapidWright
<cyrozap> daveshah: Didn't they remove stuff from the re-released version compared to the original? Though, I might be misremembering.
<daveshah> yes, that's true actually
<daveshah> some stuff moved from being open source to a precompiled JAR
<cyrozap> pie_[bnc]: I'll give you that one.
<cyrozap> daveshah: That's even worse, since it's not even fully open :P
<cyrozap> (IMO, of course)
<cyrozap> Well, anyways, I clearly have trust issues with these kinds of announcements...
pointfree has quit []
pointfree has joined ##openfpga
m_w has joined ##openfpga
nickjohnson has quit [Ping timeout: 272 seconds]
pointfree has quit [Ping timeout: 260 seconds]
m_w has quit [Quit: leaving]
stefanct has quit [Read error: Connection reset by peer]
stefanct has joined ##openfpga
<Finde> cyrozap: looks like it's up https://github.com/B-Lang-org/bsc
<pie_[bnc]> hypeee
Jybz has joined ##openfpga
<TD-Linux> wow
<pie_[bnc]> didnt even take 7 years
<TD-Linux> tbh I know little about bluespec, other than supposedly it being one of the only sane commercially used hdls
Jybz has quit [Quit: Konversation terminated!]
rohitksingh has quit [Ping timeout: 245 seconds]
rohitksingh has joined ##openfpga
<q3k> Flute: 5-stage, in-order pipeline
<q3k> Flute is intended for low-end to medium applications that require 64-bit operation, an MMU (Virtual Memory) and more performance than Piccolo-class processors.
<q3k> i uh that's actually pretty cool?
<implr> yeah, RV64ACDFIMSU is a lot
<implr> it has *floats*
<sorear> a combinatorial FPU is not the most interesting test case of a HDL for sequential logic
rohitksingh has quit [Ping timeout: 260 seconds]
rohitksingh has joined ##openfpga
rohitksingh has quit [Ping timeout: 265 seconds]
rohitksingh has joined ##openfpga
<cr1901_modern> sorear: With the understanding that implementing floating point, well, kinda stinks, I'd go farther and say "a combinatorial FPU is not the most interesting test case" :P
<cr1901_modern> (which is exactly why I would implement it that way too, speed be damned. I just want the thing to work!)
<christiaanb> where does it say the FPU is combinational?
ZombieChicken has joined ##openfpga
rohitksingh has quit [Ping timeout: 240 seconds]
Asu has quit [Remote host closed the connection]
<tpw_rules> another reminder that i need to glance at haskell...
<q3k> hm, they're missing some lectures for bsc :(
<q3k> bsv is all there but i wanted that sweet sweet haskellish syntax
<tpw_rules> is that not what haskell looks like
<q3k> i'm also really impressed that bsc seems to have basically zero hackage deps
<q3k> not even Control.Lens
nickjohnson has joined ##openfpga
pointfree has joined ##openfpga
genii has quit [Quit: Morning comes early.... GO LEAFS GO!]
<Finde> I want the Haskell syntax too
<Finde> Bring back the days of hydra, lava, etc
<q3k> for now i'm trying to actually build the damn thing
<q3k> bsc/inst/bin/s bsc -stdlib-names -bdir bsc/build/bsvlib -p -vsearch bsc/build/bsvlib -no-use-prelude Prelude.bs
<q3k> eats ~30G of RAM
Bike has joined ##openfpga
<q3k> then throws Minisat::OutOfMemoryException
<q3k> (the machine has still memory left, so it's not the oomkiller or memory pressure as far as I can tell)
<q3k> (in src/Libraries/Base1)