<xobs>
mithro: I really need to get a dev board that I can actually use...
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<futarisIRCcloud>
xobs: What dev board(s) do you have?
<xobs>
futarisIRCcloud: fomu. I've also got a HaD proto2 badge that chews through batteries. Guess I've also got a Betrusted.
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<xobs>
Well I managed to strip a bunch of stuff out of the litex bios, so now I have it fitting into the 8 kB of ROM we have. Now to try and replicate mithro's issue.
<xobs>
mithro: Yeah, I am seeing that writing into "uart_rxtx" isn't causing any data to appear in "uart_xover_rxtx".
<xobs>
mithro: scratch that, it looks like it's working if I actually let the build finish, and upload a gateware that actually has the crossover port in it!
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<xobs>
Weird bugs. Now I'm tracking down a Windows-only panic that seems to be caused by a race condition in the terminal.
<xobs>
No, not a race condition. It just panics if you don't capture the mouse on Windows.
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<xobs>
Ooh, also found an issue in Windows Terminal Preview that causes the cursor to go to (0,0) on exit. That doesn't happen in cmd.exe or powershell. I'll have to report that one.
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<sajattack>
what is lxterm supposed to do after `[LXTERM] Starting....` when loading linux?
<sajattack>
it seems to hang there but I can't be sure
<sajattack>
nevermind
<sajattack>
I didn't realize the linux image build was separate from the gateware build
<sajattack>
could use a progress bar :P
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<_florent_>
sajattack: good that you got Linux booting, i'll review your PR
<sajattack>
thanks
<sajattack>
Claude: I can't get minicom to work, can I do it with picocom?
<Claude>
don't know sajattack
<sajattack>
thanks for the merge _florent_
<sajattack>
want my linux-on-litex changes too? or wait until I get vga going?
<_florent_>
sajattack: yes sure, you can create a PR for the linux-on-litex-vexriscv too, i just renamed SDRAMSoC to MiSTerSDRAMSoC to make it clear this is using the MiSTer SDRAM extension, so you will just need to update that
<_florent_>
we could merge the vga after when it will be workign
<sajattack>
ok cool
<mithro>
_florent_ / xobs: Have you noticed that the BIOS recently got a lot bigger?
<xobs>
sajattack: I did a horrible thing by gzipping files and then doing "cat > file.b64; base64 -d file.b64 > file.gz; gunzip file.gz"
<xobs>
mithro: In order to get it to fit into 8 kB, I used small crc16/crc32, disabled `number()` (by having it print out 'x' instead), and removed `memtest`.
<_florent_>
mithro: no, i haven't noticed BIOS got a lot bigger recently, but haven't been looking at the numbers, i just know that default rom size is still fine
<_florent_>
sajattack: thanks, merged
<sajattack>
🎉
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<tumbleweed>
so, _florent_ is https://github.com/timvideos/litex-buildenv/pull/310 correct? That seems to be a change from 0x40000000 to 0xe0000000, or is that offset being applied somewhere else that I don't see?
<tpb>
Title: shadow_base was replaced by base_address by stefanor · Pull Request #310 · timvideos/litex-buildenv · GitHub (at github.com)
<_florent_>
tumbleweed: yes this is fine. Note that is you are using upstream LitePCIe, you can even remove the lambda a: 1, since i added it as default decoder
<tumbleweed>
OK, now the board is showing up with the wrong PCI device ID
<tpb>
Title: WIP: Attempt at doing a better add_memory_region by mithro · Pull Request #369 · enjoy-digital/litex · GitHub (at github.com)
<_florent_>
mithro: thanks, the usage seems closer to what i had in mind than your previous PR and the implementation is probably better than my solution, i'll will review it and test it
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<mithro>
_florent_: I still need to actually make it work
<mithro>
_florent_: But wasn't going to spend time making it work if it still horrified you :-P
<tumbleweed>
_florent_: how does that get into the gateware?
<tumbleweed>
and yes, I was getting 7021
<xobs>
mithro: for uart, what sort of failure are you seeing?
<mithro>
xobs: More it wasn't working and I wasn't sure why
<xobs>
Oh. Using a recent wishbone-tool and a recent litex?
<tumbleweed>
_florent_: yeah kgugala was saying he had been hacking on that in the netv2 repo, and things were working
<Claude>
_florent_: regarding the ddr3 on ecp5 . Indeed it seems that the ODT Pin is on a static 1 level . This means the ddr3 chip always terminates the DQ bus
<Claude>
This could explain my heat/high current draw
<Claude>
_florent_: yes I can confirm . I pulled odt on the ddr3 chip permanent low (odt disabled , selected by the chip mode registers ) and my current draw is 200mA less and heat much lower
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<sajattack>
lol did I fall on the paste key?
<sajattack>
oh, it was up arrow plus enter
<sajattack>
sorry
<sajattack>
I guess I shouldn't go to bed with my laptop if I'm gonna be sleep-pinging ppl
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<scanakci>
atommann: it may be related to clock frequency that you have used. You can try to use a higher clock frequency. If you check logs, I had a similar problem in the past and using a higher frequency helped me pass memory tests with vexriscv.
<scanakci>
today I had a chance to present Litex and BlackParrot on BARC (https://bostonarch.github.io/2020/). In case you @_florent_ get some questions after today related to presentation&Litex, do not be surprised :)
<tpb>
Title: BARC 2020 (at bostonarch.github.io)
<_florent_>
scanakci: ah ok thanks. Are the slides of the presentation available?
<scanakci>
not sure if they will make them publicly available. I can share it if they do not