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<_florent_> xobs: just for info:, happy to discuss here if you don't find that convenient for your usecase
<tpb> Title: cores/uart: rename BridgedUART to UARTEmulator and rework/simplify it… · enjoy-digital/litex@26fe45f · GitHub (at
<xobs> _florent_: So far as I know, that works!
<_florent_> xobs: the uart and uart_xover are now in two different CSR regions, is it an issue? (in the original code both UART were in the same CSR region) (i'm asking regarding mithro's comment:
<tpb> Title: cores/uart/UART: add stream interface (phy=None), add connect method … · enjoy-digital/litex@2f03d32 · GitHub (at
<xobs> _florent_: ah, yes, that is an issue. The idea of them being in the same CSR region is that it wouldn't shift the CSR table at all, and would be a true drop-in replacement.
<xobs> Complete with PHY.
<_florent_> xobs: ok sorry, i didn't catch this requirement. adds a simplified UARTCrossover module with both UARTs in the same module as you initially did. I have a preference for crossover vs loopback since for me a loopback would mean connecting uart.source to uart.sink.
<tpb> Title: cores/uart: add UARTCrossover · enjoy-digital/litex@2317519 · GitHub (at
<xobs> Alright, if it ends up with the same API I'm happy with the change. I'll need to update wishbone-tool to use the new register name of `_xover` but that's fine.
<xobs> Oh. That's what they were called before. Nevermind! Looks good to me.
<_florent_> Yes it should be in fact similar to your first version. I also reduced tx_fifo_depth/rx_fifo_depth on the crossover UART to minimize resource usage. (we already have buffering on the main uart so no need to have another buffering on the crossover UART).
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<keesj> I find the self.comb += self.uart.connect(self.uart_xover) not very elegand
<keesj> I find the self.comb += self.uart.connect(self.uart_xover) not very elegant
<_florent_> keesj: thanks for the feedback, i just change that since connect was only used once in last version of the code:
<tpb> Title: cores/uart/UARTInterface: remove connect method · enjoy-digital/litex@4648db0 · GitHub (at
<keesj> I like that one better
<somlo> _florent_: just curious, why 32868 (as opposed to, say, 0x8000)?
<tpb> Title: litex/ at master · enjoy-digital/litex · GitHub (at
* somlo ducks :D
<somlo> that's 32768, actually
<_florent_> somlo: yes i tried keeping the same default values
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<somlo> _florent_: I was just wondering about why decimal and not hex -- and screwed up the joke in the process with a typo of my own...
<_florent_> somlo: i was also wondering what was the best, i could revert to hex
<somlo> _florent_: weak vote in favor of hex from me, since it's slightly easier to follow given the surrounding context (after getting used to seeing hex everywhere, decimal just looks random) :)
<somlo> but it can probably wait for the next time you actually have to modify things in that neighborhood, as far as I'm concerned :)
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<somlo> _florent_, bunnie[m]: as of LiteX commit #f818755c, this should work with litesdcard:
<tpb> Title: [Diff] diff --git a/litesdcard/firmware/sdcard.c b/litesdcard/firmware/sdcard.c index - (at
<somlo> I'm getting the same results as before (successful "sdclk 10" and "sdinit", hangs during "sdtest 8"), but the values read from the SDCORE_RESPONSE CSR are the same :)
<_florent_> somlo: thanks, i'll test tomorrow!
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<somlo> _florent: ok, it's now, let me know what you think whenever you get a chance
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