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<emeb> dammit - working on this 6502 FPGA system has me sidetracked into studying MS BASIC assembly code from 1978.
<_whitenotifier-1> [Glasgow] whitequark commented on issue #116: Verify NAND programming on revC - https://git.io/fjLPp
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjLPh
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark c581656 - applet.memory.onfi: mark as preview-quality again.
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow-Archive] whitequark pushed 1 commit to master [+2/-0/±0] https://git.io/fjLX3
<_whitenotifier-1> [GlasgowEmbedded/Glasgow-Archive] whitequark 8840ac5 - Add G00030: ONFI 1.0
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjLXl
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark c733ace - support.bits: fix misleading error message.
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 3 commits to master [+1/-0/±3] https://git.io/fjL19
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 431cada - applet.memory.onfi: increase wait states to 3.
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark aaa0c07 - protocol.onfi: new protocol.
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark bdb299f - applet.memory.onfi: parse and use ONFI parameter page.
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fjLMn
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 5e4362f - applet.memory.onfi: print ID signature.
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 7bfb641 - applet.memory.onfi: allow reading data and spare into one file.
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fjLyv
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 23f5abe - applet.memory.onfi: remove debugging code.
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 87bea67 - applet.memory.onfi: implement up to 4 CE#, and add some docs.
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fjLyp
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 35beeb6 - applet.memory.onfi: use R/B# wait after Reset.
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 20eb2d2 - applet.memory.onfi: unconditionally reset all targets.
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<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjLSI
<_whitenotifier-1> [GlasgowEmbedded/Glasgow] whitequark 70a5dfa - applet.memory.onfi: allow programming data and spare from one file.
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<tnt> daveshah: in the IO tile, the z=0 is the 'N' side of the diff input right ? (and z=1 the 'P' side)
<daveshah> Pretty sure z=0 is the 'P' side
<daveshah> IO cell z=0
<daveshah> Which is IeRen z=1 on the newer devices just to confuse things
<tnt> Mmm , I was looking at TN1253 which made me doubt things :/
<tnt> first page the graphics with the LVDS input has DPxxA DPxxB markings.
<daveshah> The pinout spreadsheet refers to the "A" side as true
<tnt> yeah ... that's what's confusing, one document contradicts the other.
<daveshah> nextpnr treats the "A" side as "P" and that worked for my CSI-2 project
<tnt> Ok, yeah good enough :)
<tnt> I remember that there was something weird, but I think that what I remember is the SB_IO instance has to be on the N pin.
<daveshah> Not in nextpnr, afaik
<tnt> mmm, maybe that was arachne ? Oh well ... maybe I'm just wrong.
<adamgreig> Pretty sure I had to use the N pin on ice40 for the SB_IO in comparator mode
<tnt> yeah, I have that memory too.
<daveshah> I think the P pin is always used, but this is the 'A' side for UP5K and 'B' side for the older iCE40s
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