##openfpga on 2019-06-11 — irc logs at freenode.irclog.whitequark.org

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00:29 <SolraBiz1a> somebody in here wanted to know how fast

00:29 <SolraBiz1a> *FE310 GPIOs were

00:30 <SolraBiz1a> "physically constrained" at 100MHz, and if you're bit banging then your absolute maximum is CPU frequency / 15

00:30 <whitequark> /15?

00:30 <whitequark> can't you use the bit band areas?

00:31 <SolraBiz1a> https://forums.sifive.com/t/speed-of-the-e31-at-its-i-o-pins/174/2

00:42 <TD-Linux> /15? ouch

00:42 <TD-Linux> on a stm32 it's like /2

00:43 <whitequark> oh, no bit banding

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00:45 <SolraBiz1a> I hadn't heard of bit banding before

00:51 <SolraBiz1a> I think simple (non-AMO) writes/reads would be faster than /15

00:53 <whitequark> i wonder if there's CDC issues there?

00:54 <SolraBiz1a> clock domain crossing?

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00:55 <whitequark> yes

00:56 <_whitenotifier-3> [Boneless-CPU] zignig synchronize pull request #3: Text Assembler for boneless (Nearly) - https://git.io/fhxmz

00:57 <SolraBiz1a> based on my reading of the manual, there shouldn't be any for bit-banging

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12:49 * zignig does a happy dance.

12:51 <zignig> managed to get a Boneless-CPU running on a tiny_bx with the new nmigen-boards code.

12:51 * zignig also managed to auto memory map Elaboratables into the cpu external interface

12:53 <zignig> link : https://github.com/zignig/tinybx_stuff/blob/master/platform_test/construct.py

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