17:53 <andrewb1999> I'm trying to use the litedram dma reader/writer and looking at the code it looks like I might need to add an up converter to support bursting. It seems like the litedram dma sends sequential addresses to the dram controller even when the CSRs are set for a long transfer. Am I understanding this correctly? Are there any examples of using the litedram dma that I can look at?

20:04 <_florent_> andrewb1999: the DMA frontend indeed does not have explicit burst signals but the controller will automatically regroup accesses in burst when possible. I'm not sure there is an example for this in the repositories but i could add one next week.

21:35 <andrewb1999> _florent_: Thanks. If you could add an example that would be great!