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<peepsalot>
hi. is it possible to use yosys with intel DE10-Nano boards? Cyclone V SE 5CSEBA6U23I7
<mwk>
ZirconiumX:
<ZirconiumX>
peepsalot: short answer: no. long answer: I'm working on it, and maybe soon we can.
<peepsalot>
ok, i'm still absolute beginner to fpga, but more open source tools are very appealing to me :)
<peepsalot>
ZirconiumX: do you own one? or is there anything I can help with testing?
<ZirconiumX>
peepsalot: I'm at a stage where I can produce a netlist, but due to present Quartus incompatibilities (and bugs) you can't do anything with it
<ZirconiumX>
I do indeed, as part of a MiSTer
<peepsalot>
ah, nice, MiSTer is one of my main reasons for interest too
<ZirconiumX>
Actually getting MiSTer to run on a purely-open toolchain is a long way off however
<peepsalot>
ZirconiumX: do you work on any specific mister cores?
<ZirconiumX>
I submitted a patch to Minimig
<ZirconiumX>
But it got rejected because Sorgelig apparently can't read the Verilog LRM...
<peepsalot>
:(
<ZirconiumX>
Unfortunately even the most easily ported core - Minimig - is basically impractical to compile at present, because while the Amiga chipset is implemented in Verilog, the 68000 cores are all VHDL
<ZirconiumX>
And Yosys has no native VHDL support
<ZirconiumX>
There is an ongoing effort to use GHDL as a front-end module for VHDL, but that's beta-quality at best
<ZirconiumX>
And requires an Ada toolchain that most people won't have by default
<peepsalot>
i want to try to implement some vector display arcade stuff like battlezone etc.
<ZirconiumX>
peepsalot: with all of that said, I would greatly appreciate whatever help you think you can offer.
<peepsalot>
my dream goal is to interface with laser projector so I can put it on my ~200" display...a white wall in my house ;)
<ZirconiumX>
That sounds wonderful
<peepsalot>
its a little disappointing that the lead dev seems so hard to work with
<ZirconiumX>
Yeah...
<peepsalot>
but yeah as I said, i'm only absolute beginner to FPGA, so probably not much help to you. still trying to grasp the very basics of HDL etc. i've been a software programmer for many years though
* N2TOH
just got his Spartan 6 board the other day
<ZirconiumX>
peepsalot: much of what I'm working on is the software side of it all
<ZirconiumX>
N2TOH: thank mwk for adding xc6s support to Yosys (using ISE as a backend)
<N2TOH>
*nods*
<N2TOH>
my JTAG adapter is sill in China so I need something
<N2TOH>
my end use should be simple enough
<N2TOH>
gonna use it as a memory manager for a 65C816
<N2TOH>
I went with this FPGA cause it has enough IO
<N2TOH>
never mind it has enough logic to IMPLEMENT the CPU I'm interfacing too!
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* N2TOH
reads how to wire up an FTDI chip to this FPGA board
<peepsalot>
can place and route be accelerated by solving ON an FPGA?
<OK_b00m3r>
there are some papers on that iirc
<N2TOH>
where is a list of known good JTAG interfaces?
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<N2TOH>
should getting Xilinx ISE be a tremendous pain to get running?
<tpb>
Title: Imgur: The magic of the Internet (at imgur.com)
<peepsalot>
well, i don't know specifically about xilinx, but I'm pretty sure there's its been mandated that all embedded tools be as cumbersome as imaginable
<N2TOH>
I installed it and had it running, now I can't recall how to start it
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<N2TOH>
HOA=Horribly Organized Assholes
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<mwk>
N2TOH: yes, ISE is a pain, that's normal
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<N2TOH>
I seem to have forgotten how to get it started after installing and running it once
<N2TOH>
that also seem normal when playing with ubuntu
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