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<awygle> i really don't mind that freenode occasionally just kicks me for no reason, but i wish recovering to a good state wasn't such a pita
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<pie_> rqou, dod you get youre....Project Chibi Board yet?
<pie_> *puts on sunglasses* YEAHHHHHHHHH
<pie_> ... *your
<awygle> ... why is this question csi miami worthy?
<pie_> PCB :'(
<awygle> Ohhhh
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<awygle> Looking at tinyfpga 's EX assembly pictures has me wondering if there's a way to make them useful as brain boards for something like a 1x PCIe development card
<awygle> "very short USB C-to-C cable" seems a bit inelegant lol
<prpplague> awygle: curious what you would use as the pcie interface to it
<awygle> prpplague: well the EX has high speed serdes sufficient for PCIe 1.1, maybe 2.0. Or did you mean on the host side?
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<prpplague> awygle: yea, i was just curious if you were going to use the serdes or if you were going to do something like a pcie to gpio chipset
<awygle> prpplague: I'd like to use the serdes. I know TI has a 1.1 chipset but it seems both more expensive and more complicated than serdes direct
<prpplague> yea
<awygle> The obvious board to board solutions like smp or qsh tend to be pretty expensive tho
<awygle> And you can't play castellated hole games when it's a double sided board (which of course it has to be)
<awygle> Probably better to reuse much of the schematic and layout on a new board. Kind of a bummer tho.
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<pie_> So to paint a political target on my back, obviously the article has a negative disposition, but it's probably right. Does not make me proud of my country.
<pie_> There will obviously not be any negative fallout of this. Nope.
<rqou> i mean, the US already bombed a MSF hospital and got away with it
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<pie_> well theres fallout and theres fallout
<pie_> i mean its not like i keep up with this stuff, which is probably why i still have energy to be angry
<pie_> whats MSF?
<pie_> though i think i may have heard about that
<rqou> Médecins sans frontières / Doctors without borders
<pie_> aha
<pie_> so fucked up
<pie_> im not saying its ok but that does seem to be different than this drone stuff
<rqou> if it's any consolation, it turns out that rebel groups now have drones too
<pie_> not really
<rqou> drones powered by AliExpress/TaoBao :P
<pie_> hah
<rqou> fictional rebellions are sponsored by Pizza Hut, IRL rebellions are sponsored by Chinese businessmen trying to make a quick buck :P
<pie_> hah\
<pie_> the irony of whether us of chinese/russian hegemony would be better
<pie_> *us or
<sorear> I for one would be very interested to see a fully open PCIe stack using ecp5 SERDESes
<awygle> yup yup, same. I even bought a versa board for that purpose (among others).
<pie_> ^
<awygle> who has the time tho :-(
* awygle briefly contemplates quitting work to hack all day
<rqou> pie_: it'd be pretty funny to see chinese sellers start advertising in Chinglish "DIY Drone Kit For Bomb Government" :P
<pie_> hah
<pie_> that would be just a little surreal
<pie_> not sure it would work though, by the time it ships, omae wa mou shindeiru
<qu1j0t3> whoa whoa translation please for the non ******* in here
<awygle> "you are already dead"
<sorear> “you are already dead” with an unusual pronoun choice, probably a quote from something
<awygle> Fist of the North Star
<awygle> (and tons of meme)
<pie_> just tons of meme (and anime, but i havent see it, so just meme)
<pie_> memes are the new idioms
<pie_> idioms are for literates
<prpplague> * awygle briefly contemplates quitting work to hack all day
<prpplague> can i quit too?
<awygle> can you? yes. should you? ..... maybe not.
<rqou> whitequark: works pretty well on my desktop
<qu1j0t3> can I? i mean we all want to
<rqou> except the menus overlap when i click on one?
<rqou> yeah, in general the menus seem unusable still
<rqou> and clicking on the "picture" icon on the left (3rd row, right column) causes a crash
<rqou> (i don't actually know how to use solvespace)
<awygle> whitequark: awesome! i think it doesn't like my hidpi laptop though, the mouse is way off
<whitequark> this says which crashes shouldn't be reported
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<whitequark> menus should be usable
<whitequark> awygle: what
<whitequark> I'm testing this on a hidpi laptop
<whitequark> oh this is probably the viewport sizing bug
<awygle> oh. well, must not be that hten
<whitequark> fucking piece of shit CSS
<rqou> sorry, i didn't see that guide before
<whitequark> rqou: i just wrote it in response
<rqou> also, the things i complained about aren't on that list?
<whitequark> i think i just fixed the menu bug
<whitequark> se
<whitequark> you're on firefox right
<rqou> yeah
<rqou> is it different somehow?
<whitequark> no i just was testing on chrome
<whitequark> firefox doesn't support one of the CSS properties I use
<rqou> hmm, oshpark really does seem to have a surprisingly high defect rate
<rqou> am i just having particularly bad luck?
<awygle> whitequark: i'm not totally sure what viewport sizing means here, would you like me to report this mouse issue on that gist?
<whitequark> sure
<rqou> whitequark: i'm curious why you're doing a web port in the first place?
<whitequark> rqou: F5 and check if menus work now
<rqou> i thought you hated web-based applications
<rqou> works now
<whitequark> yes
<whitequark> i hate them even more now
<whitequark> i also hate macos and windows and yet solvespace has those ports
<rqou> but you still made one?
<whitequark> yes
<whitequark> my personal preference is not absolute
<rqou> what's the motivation for making this?
<whitequark> easy way to try it out and see if it works for you
<rqou> but when i said that you weren't happy with that argument
<whitequark> no, the desktop edition is still the primary way you would use it
<whitequark> webgl is slow as fuck, especially in $not_chrome
<rqou> hmm, hasn't been my experience
<rqou> anyways, bug: can't tap anything in the toolbox on my phone :P
<rqou> idk if you care lol
<whitequark> touch events work on my chrome desktop
<rqou> tapping on the menu works
<awygle> they work on my windows desktop in both ff and chrome
<rqou> it always seems to think i tapped somewhere else
<whitequark> oh
<whitequark> viewport bug
<awygle> oh you have my same offset bug then probably
<whitequark> html is really not designed to have like, more than one canvas
<whitequark> or have anything on the page other than the canvas
<whitequark> what is the fucking point of even having it as a tag, just replace the whole browser window with a canvas
<rqou> wait why?
<whitequark> if you go into fullscreen chrome forcibly hides everything other than the canvas.
<rqou> i've never encountered problems with this?
<whitequark> there is no way around it.
<rqou> oh idk about fullscreen
<whitequark> except sometimes it shows other elements on top of it but fucks up the sizing model
<rqou> i've never actually used fullscreen
<whitequark> and all other browsers also fuck up fullscreen but in different ways
<whitequark> you want fullscreen because otherwise browsers react to keybindings in weird ways
<whitequark> awygle: right, it is exactly the viewport bug
<whitequark> it can be fixed by resizing the window
<whitequark> "fixed"
<rqou> works correctly on my machine with devPixelsPerPx set to 2
<rqou> whitequark: um, can't resize the window on my phone :P
<whitequark> exactly
<rqou> exactly what? wontfix?
<whitequark> exactly can't resize the window
<whitequark> I spent like a hour trying to get the canvas to take 100% of vertical space
<whitequark> no luck
<rqou> but then your "fix" doesn't work on phones :P
<whitequark> it's not a fix
<awygle> "cantfix" is an underutilized bug closure tag.
<whitequark> lol
<whitequark> yeah something like that
<awygle> "in order to fix this bug, you must first repair the universe"
<whitequark> ah, the story of my life
<whitequark> i repaired at least three universes by this point but all i get is more broken shit
<pie_> its universes all the way down
<pie_> or up
<rqou> interesting random observation: oshpark fr4 substrate is much whiter than i expected
<awygle> it's FR408 is why
<awygle> not the same
<rqou> what's the difference?
<awygle> FR408 is better
<rqou> in what way?
<awygle> low Dk, low Df (for FR-4-type materials)
<pie_> a cumulative hierarchy of shit
<awygle> it's good for medium-high frequencies
<rqou> the glass weave pitch isn't as fine as i expected
<rqou> you can see very faint squares
<awygle> yup
<awygle> iirc there's actually some measurable anisotropy?
<rqou> yeah, but i doubt i care (yet)
<rqou> i'm not trying to build a 100g switch or anything like that (*cough* *cough*)
<awygle> :p
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<awygle> whitequark: just sounding you out - are you at all interested in extracting the platform gui abstraction stuff in solvesepace into a separate library? would you entertain a pr doing that?
<awygle> (perhaps not immediately, i'm aware it's days old)
<whitequark> awygle: you can literally just copy the platform/gui* files somewhere
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<awygle> yeah, it's just appealing to get bug fixes and enhancements "automatically"
<awygle> if you're not interested that's probably what I'll do for my next software project, just copy the files
<whitequark> you'll also get solvespace-specific refactoring "automatically"
<whitequark> it sits in the same repo so that I can apply refactoring in the same commit to all the parts
<awygle> yeah but you're conscientious, you'd separate concerns diligently lol. I am aware this would be a net negative for you maintainability wise, just thought I'd ask
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<rqou> hmm i figured out why a bunch of max v chips have die pads that are unbonded in any package
<rqou> they're bonded in a max ii package
<sorear> Do they do anything interesting?
<rqou> i mean, it exists?
<rqou> if you can decap the chip you can get a probe on it?
<rqou> sorry idk what kind of answer you were looking for
<sorear> I mean like are they I/Os or is this an ice40 TRESET situation?
<rqou> idk about TRESET, but it's just a boring unbonded IO
<rqou> offtopic: i <3 tile molester for doing bitstream RE
<rqou> really convenient if you're just messing around and guessing
<pie_> is that the name of your fuzzer
<pie_> tile molester
<pie_> or wut
<pie_> xD
<rqou> no, it's a tool from the rom hacking scene
<pie_> ah
<rqou> good for turning binary files into images
<pie_> i was going all, yes lolita, no touch
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<rqou> azonenberg: ping?
<rqou> diamondman: ping
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<rqou> i really need some kind of jtag thing for max v
<rqou> don't make me write a giant hack to output SVFs
<azonenberg> i have zero time to work on anything
<azonenberg> i'm moving out in a week
<azonenberg> my lab will be in boxes for probably a month after that
<rqou> that was meant for diamondman
<rqou> azonenberg: i wanted to ask you whether you think this looks right or not:
<rqou> the geometry is correct
<rqou> the only bit of weirdness is those bits just to the right of the cutout
<rqou> azonenberg: i also wanted to ask you the usual question of "how's your friggin house coming along"
<azonenberg> We hung more insulation and moved a bunch of electrical boxes today, also fixed a few miscellaneous small things that had been put off for too long
<azonenberg> Sheetrock shows up monday so thats the new deadline to get it ready
<azonenberg> But i'm also busy boxing up all of the stuff in the house
<rqou> oh, you got it fixed?
<azonenberg> yes, finally
<azonenberg> delivery is confirmed with the vendor
<rqou> did you end up expressing immense displeasure at them? :P
<azonenberg> Yes :p
<azonenberg> But i'm also so overloaded i barely have time to think about anything now
<azonenberg> the only reason i'm even on the computer is because thats where my spreadsheet full of "what's in each box" lives
<rqou> oh wow, that's better than when i moved
<rqou> my procedure was "are there any items left in this room? yes/no"
<rqou> azonenberg: have time for random speculation?
<azonenberg> lol
<azonenberg> well all of my boxes still have numbers written on them from the last move
<azonenberg> and i still have the same google doc
<rqou> oh goddammit
<azonenberg> Some boxes (4" wafer prober, for example, or some textbooks) never got opened
<azonenberg> So those lines never got touched
<azonenberg> The ones i opened and unpacked just need to be redone
<azonenberg> And some stuff isn't going in numbered boxes because i'm moving it as just a single object by itself
<azonenberg> like furniture
<azonenberg> I booked a month at a hotel a few minutes from the new house so that should (hopefully) see us through to the end of it
<azonenberg> couldnt find any short term apartments on short notice
<azonenberg> the best i found wanted a multi month lease and wasnt available until mid july
<azonenberg> mid augusT*
<rqou> how much does it cost to book a hotel for a month lol?
<rqou> do you get discounts for doing that?
<azonenberg> It's comparable to what i'm paying in rent + utilities here iirc, but for a single room :p
<azonenberg> maybe a little bit more
<azonenberg> i think 85 a night which comes out to around 3k/mo
<azonenberg> the daily rate is over 100 a night, this is the discount for an extended stay
<rqou> ah, so there is a discount of some kind
<azonenberg> Yeah
<rqou> anyways, back to the speculation i wanted to ask you about
<azonenberg> branch not taken
<azonenberg> :p
<pie_> i guess hotels are EZ if you pay 3k/mo ... xD
<rqou> i poked at altera's PCNs, and apparently max v and max ii are made on _the same fab_
<azonenberg> rqou: same process?
<rqou> i think so?
<rqou> why did they even bother changing anything?
<azonenberg> not entirely sure, lol
<azonenberg> pie_: well i'm paying 2.5k a month in rent now
<azonenberg> for a *house*
<rqou> they were previously different fabs but became the same fab
<azonenberg> 3k a month for a *room* is not ideal
<azonenberg> But when you need a place to stay now, not in a few weeks, there are not a lot of options
<rqou> pie_: remember that azonenberg isn't quite in the SF bay :P
<sorear> Need a new “model year”?
<azonenberg> The housing shortage here isn't quite as bad as SF but it's close
<rqou> i don't think you semi-regularly see news about students at $FANCY_SCHOOL being homeless up there
<rqou> (yes, this happens)
<rqou> ('murca)
<azonenberg> there was a guy at GOOG who was famous for living out of a truck
<azonenberg> so yeah i believe it
<pie_> true, for a house
<azonenberg> pie_: the hard part is that i will *also* be paying mortgage on a house during that time
<pie_> ah :I
<azonenberg> Which will bring my total housing budget up to $5k/mo
<pie_> yrah
<pie_> didnt htink of that
<azonenberg> The good news is that i wont have to spend much on construction
<azonenberg> as we have basically all of the materials we need by this point
<azonenberg> or at least, they've been ordered
<azonenberg> mostly just installing stuff now
<azonenberg> so lots of time but fairly low material cost
<rqou> this mentions that max ii was primarily made on TSMC Hsinchu and additionally became qualified for TSMC Washington
<rqou> (Fab 8 vs Fab 11)
<rqou> whereas max v was primarily fab 11
<pie_> fab fab fab
<daveshah> I suppose the consolidation makes sense really
<rqou> but what did they go and tweak the pad ring for?
<rqou> (or did they even do that?)
<azonenberg> so they are bitstream identical and made at the same fab
<azonenberg> on the same process?
<rqou> probably?
<azonenberg> is it possible one is like a LP variant of the other or something?
<rqou> the fabric timing parameters are identical
<azonenberg> voltage change?
<azonenberg> o_O
<azonenberg> wooow
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<rqou> they already did the voltage change earlier
<rqou> the pad ring timing parameters are different
<azonenberg> so same bitstreams, same jtag idcode, AND identical timing?
<azonenberg> oh ok
<azonenberg> hmmmmm
<azonenberg> is max ii still made?
<rqou> yes?
<pie_> so did rqou just discover two fpgas are the same
<rqou> much more expensive for some reason
<pie_> "same"
<daveshah> rqou: that's the reason
<daveshah> Market segmentation
<azonenberg> So it's not "oh that fab shut down, so we respun the fabric with a new pad ring for the new fab"
<pie_> binning?
<rqou> the bins are the same too
<rqou> well, with different labels
<daveshah> The customers that require continuity and long lead times buy the older part for more $
<pie_> require lng lead times lol
<daveshah> The customers with fast development cycles pay less
<daveshah> Development lead tomes
<pie_> ah
<diamondman> rqou: I really want to. Be able to. Test an actual chip instead if just winging it
<rqou> alright, well that should be possible soon(tm)
<rqou> azonenberg: so do you think they made them not-quite-footprint-compatible on purpose?
<azonenberg> rqou: eh, i really doubt they'd do a new tapeout of a nearly identical chip for segmentation
<azonenberg> there must have been something wrong with the old pad ring
<azonenberg> esd? idk
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<rqou> hmm, the timing parameters are really really close
<rqou> but not identical like the fabric ones
<daveshah> Just a change in nominal parameters due to process improvements?
<rqou> but that should apply to the fabric too?
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<daveshah> Maybe not for some reason, maybe they just cba to requalify the fabric
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<rqou> what a lazy job they did here
<rqou> azonenberg: think we really need to do some decaps?
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<azonenberg> yeah i'm suspecting probably a new process
<azonenberg> but a tiny mod of an existing one
<azonenberg> lower leakage or something
<azonenberg> how's static power compare?
<rqou> same
<daveshah> Random thing I found the other day - the codename for the iCE40 UltraPlus was Thunder Plus
<daveshah> Somewhat disappointed they didn't stick with that
<rqou> random complaint: digilent pmod pricing is all over the board
<rqou> some parts are pretty cheap and some are stupid expensive for what they are
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<sorear> Maybe the old timings were excessively optimistic and the entire process improvement went into yield
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<rqou> azonenberg: got any "favorite" pmods?
<rqou> i'm getting a VGA one because apparently everybody goes nuts over VGA demos
<daveshah> You could get one of the LED panel ones
<daveshah> people love those for some reason too
<rqou> that's not an official digilent one?
<daveshah> oh, idk, I buy pmods from trenz because I'm in Europe
<daveshah> they resell digilent but also their own
<azonenberg> rqou: i have one of the 128x32 monochorme and 96x64 color oled modules
<azonenberg> i brought up a controller for the mono but not the color
<rqou> meh, those don't really interest me at all
<azonenberg> was thinking of using them in lab equipment etc to show the IP address etc
<azonenberg> for bringup
<rqou> not an oldschool hd44780?
<azonenberg> That's an option too, i have no decision made at this point because i dont even have a particular project in mind :p
<azonenberg> and right now all of my pmods and devkits are slowly getting shoved into boxes
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<rqou> ok, i just got the vga and audio in/out ones
<azonenberg> honestly i'm a lot more interested in displayport than vga
<rqou> use an adapter? :P
<azonenberg> smaller connector, no analog noise problems
<rqou> oh wait, they usually don't go this direction
<azonenberg> only one GTP worth of pins
<daveshah> azonenberg: should be doable on the ECP5, but only 2.7Gbit
<azonenberg> daveshah: i've had this project on my TODO for years
<azonenberg> that i never have had time to build
<daveshah> In theory it should be possible to run DP Alt mode on the new tinyfpga usb-c
<azonenberg> USB 1.x host for mouse/keyboard
<azonenberg> displayport
<azonenberg> gig-e
<azonenberg> basically a TCP offload engine glued to a framebuffer
<azonenberg> CPU-less VNC client
<daveshah> istr there was a thin client a while ago that had a surprisingly big fpga in
<daveshah> but I don't think it was CPU-less
<azonenberg> yeah i've pentested a few at work
<azonenberg> What i want is a bare bones thing that literally takes incoming TCP segments and DMAs them into a framebuffer
<azonenberg> after parsing out the x/y coordinates from the vnc framing
<azonenberg> then converts usb hid reports to VNC mouse/keyboard commands
<daveshah> yeah, that would be very neat
<azonenberg> The idea was to have something that was effectively impossible to pwn over the network
<azonenberg> and had hardware WP on the flash so it was guaranteed to be clean on reboot even if you did somehow compromise it
<pie_> sounds like something you could make big bucks off of :p
<azonenberg> Lol it might be productizable if i added more features
<azonenberg> i wanted minimum viable functionality, uncompressed VNC only
<azonenberg> no RDP, no compression, etc
<azonenberg> to start at least
<azonenberg> in any case the main goal was to have no general purpose CPU there
<azonenberg> Such that you could have provable worst-case behavior
<azonenberg> i.e. no matter what bugs exist in the system, no matter how malformed the packets you feed it
<azonenberg> you can never have more than one open socket (because the TCP stack is hardware with only one stream supported)
<azonenberg> it can never initiate a client connection anywhere once that one socket is open
<azonenberg> etc
<azonenberg> formally verify as much of the state machine as possible
<pie_> step 1) sell it as an f35 component
<pie_> step 2) dont get considered because not complicated enough
<azonenberg> lol
<rqou> ugh i'm super tired today so i'm going to zzz
<rqou> in general this is much easier once you've been through the exercise once :P
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<gruetzkopf> people are talking pcie again
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<bubble_buster> ?
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<rqou> azonenberg: what do you think of adding a "upgrade to EU edition" script to xc2par? would it be ok or potentially interpreted as acknowledgement that you had violated the EULA at least once?
<daveshah> rqou: don't forget an IP address check :P
<rqou> nah, this isn't for GPDR :P
<daveshah> Please attach a scan of your EU passport and proof of an EU address
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<awygle> "please attach a scan of your American passport. Congratulations, you've been locked out of this feature"
<rqou> lolol
<rqou> but that requires somebody to build tensorflow-rs first :P
<daveshah> For security you should just require a fax of the passport, so it can't be haxored
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<daveshah> just found this interesting Lattice "nice try"
<daveshah> €40 for a €5 Adafruit SD card breakout with a bodge wire and a cheapo 8GB SD card
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<awygle> can't believe tensorflow-rs _isn't_ a thing
<sorear> require the tool to be used with the fpga attached, and use that for offload :P
<awygle> "fpga that accelerates fpga synthesis/par" has kicked around in the back of my mind as an awesome tech demo for a long time
<sorear> you'd need a usefully parallelizable algorithm first
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<awygle> wonder how hard it would be to do SA on an FPGA
<awygle> i mean it would provide ~no benefit
<awygle> but it might offload from like, a Cortex-M
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<rqou> complaint: desk moves are doubleplusunfun
<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master:
<openfpga-bot> jtaghal/master cec088b Andrew Zonenberg: Various display improvements for STM32 debug probing
<awygle> yeah i have the opportunity for a total desk upgrade but i'm too lazy to make the move
<awygle> also complaint - apartment moves are doubleplusunfun
<qu1j0t3> ^
<awygle> but on the other hand - try to raise MY rent by 10% will you? fuck off i'm out of here
<rqou> somehow i seem to consistently get unlucky and end up in the areas that $EXECUTIVES decide need renovating or whatever
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<mithro> azonenberg: Could you take a look at a yosys patch for me, I'm pretty close to getting it working but I'm probably doing something stupid
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<mithro> daveshah: Could use your review as well
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<cyrozap> azonenberg, daveshah: RE: the CPU-less VNC client, I think you're thinking of this:
<cyrozap> The Pano Logic G2 zero clients have Spartan-6 LX100's/LX150's, depending on which revision it is, and the G1's used the Spartan-3E.
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<azonenberg_work> cyrozap: what is the fpga supposed to be used for in the stock firmware?
<azonenberg_work> display controller?
<azonenberg_work> is it the whole soc or is there an arm core or something
<rqou> seriously why does Windows update never work properly:
<rqou> somehow Debian managed to work properly most of the time
<daveshah> Even Arch does a much better job
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<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master:
<openfpga-bot> jtaghal/master 2a36739 Andrew Zonenberg: Initial ARM7TDMI-S class structure
<rqou> wtf azonenberg why are you still dealing with arm7tdmi?
<azonenberg_work> rqou: I'm going through devkits around the lab and adding basic class hierarchy and "at least show me what all the coresight IP is, even if you can't talk to it yet"
<rqou> and you have an arm7 somehow?
<azonenberg_work> we have a Tegra Jetson X1 board that has a quad core A57 and an ARM7TDMI that homebrew forums suggest is used for secure boot or something
<azonenberg_work> interestingly enough the arm7 is so old it doesn't support coresight
<rqou> yes that's correct
<azonenberg_work> so there's an ADIv5 DAP and a separate jtag tap for the arm7
<rqou> although secure boot is pwned
<rqou> wait azonenberg why didn't you help us find the exploit?
<azonenberg_work> rqou: we had a team at ioa looking at the switch when it first came out but the public break happened first
<rqou> i can't believe we all missed it
<azonenberg_work> once it was broken there was no point in poking more
<azonenberg_work> So the devkit kinda sat around
<azonenberg_work> but its a perfectly useable quad core arm board
<rqou> unlike mine that is missing decoupling caps?
<cyrozap> azonenberg_work: There wasn't any CPU at all--everything is connected to the FPGA. The FPGA basically did PCIe-over-Ethernet (well, UDP) and exposed each of the peripherals connected to it (display output, USB, audio, etc.) to the VM.
<azonenberg_work> cyrozap: oh awesome
<azonenberg_work> that soudns pretty similar to what i wanted, except rather than being raw pcie etc
<azonenberg_work> i wanted to do VNC
<rqou> anyways, <drama> i certainly don't condone transphobic attacks, but people who love embargos and then go and call people "unethical" get very few sympathies from me
<cyrozap> azonenberg_work: Yeah, with the Pano's, most of the complexity is on the host software side, and each client is just a remotely-addressable collection of memory-mapped peripherals. This avoids the need to build complex state machines in the hardware.
<azonenberg_work> yeah but it seems like it could have security issues
<azonenberg_work> in particular risk of a badusb-style attack against clientside stuff
<azonenberg_work> i wanted to make something that implemented the usb hid host in hardware and just moved ascii text or scan codes or something
<cyrozap> And of course that all worked because the devices were being managed by software running on the VM server/host--they can't run standalone at all.
<cyrozap> Oh, yeah, but even besides badUSB jus having a remote PCIe device is a potential security issue in itself, especially if it's neither encrypted nor authenticated.
<daveshah> Hrm, that sounds very questionable
<azonenberg_work> lol yes
<azonenberg_work> My goal was to have the network protocol be a strict subset of VNC (i.e. many fancy modes not supported)
<azonenberg_work> basicaly mouse and keystroke input one way and pixels the other
<azonenberg_work> With optional crypto over the link
<azonenberg_work> probably using something lightweight like SSP21 instead of full TLS
<cyrozap> If I were to build something like that, I'd do the all the I/O networking over Wireguard. The packet format is simple enough for an FPGA to parse and generate (e.g., it runs over UDP), the protocol overall is mostly stateless, and I wouldn't have to write my own server for it.
<azonenberg_work> Are you familir with SSP21?
<cyrozap> I've never heard of it until just now.
<azonenberg_work> it's meant for low resourced SCADA devices
<azonenberg_work> i've wanted to make an FPGA implementation for a while
<azonenberg_work> talked to the guys when they first announced it but havent had time
<cyrozap> That gives me great confidence in it's security. /s
<azonenberg_work> They've actually done pretty extensive analysis on it
<cyrozap> Miss me with that SCADA shit :P
<whitequark> rqou: what? who called who unethical
<azonenberg_work> cyrozap: LLNL did a lot of the security work for it
<rqou> whitequark: ktemkin was calling "people who would be willing to drop zero-days like the Tegra X1 bootrom bug" unethical
<cyrozap> azonenberg_work: Well maybe if you do an FPGA implimentation you'll discover something nasty about it :)
<azonenberg_work> cyrozap: lol
<azonenberg_work> the protocol looked simple enough that i am confident i can implement it
<azonenberg_work> the hardest part is probably going to be the crypto
<azonenberg_work> they use curve25519 and i don't think there's any f/oss FPGA implementations of it
<awygle> the problem with going not-TLS is that you lose compatibility with ~all software immediately.
<azonenberg_work> yes, but it also means i dont have to deal with x.509 etc :p
<azonenberg_work> and you could easily implement ssp21 as a tunnel then run whatever you want on the other side in cleartext
<azonenberg_work> that was in fact a design goal, "bump in the wire" mode as they call it
<azonenberg_work> to retrofit legacy cleartext protocols
<awygle> should hack ssp21 into idk, tightvnc lol
<azonenberg_work> lol its a possibility but i need an implementation first and its low on my priority list for now :p
<cyrozap> azonenberg_work: lol Wireguard also uses curve25519, so if you write a core for that I'd be very interested in it. It also uses BLAKE2s (which thankfully I'm somewhat familiar with), ChaCha20, and Poly1305.
<cyrozap> awygle: That's partly why I'd use Wireguard--there's already a kernel module for it and it'd let me talk to whatever I want over plain-old IP.
<awygle> sounds reasonable
* awygle is almost totally ignorant in this area
<awygle> something something ipsec
<cyrozap> And then I'd probably use Wishbone-over-Ethernet-over-Wireguard-over-Ethernet and drive the memory-mapped peripherals directly from the PC.
<awygle> i know we've sort of talked about this in the past but has anybody here played with Elmer, OpenEMS, or MMTL?
<sorear> "no f/oss curve25519 modules" is, actually pretty surprising?
<azonenberg_work> sorear: everyone seems to use the canonical C reference implementation in libsodium
<azonenberg_work> if anyone is doing it in hardware they're not sharing
<azonenberg_work> But it's been aw hile since i last looked, someone may have done one recently
<sorear> does ssp21 use x25519 (kex) ed25519 (signature) or both?
<cyrozap> Personally I don't think I'd be comfortable implelenting my own crypto core.
<cyrozap> s/implelenting/implementing/
<azonenberg_work> cyrozap: i'd want to get it carefully reviewed before using it anywhere important
<azonenberg_work> But if i have an implementation out there, and there is no good open implementation
<azonenberg_work> i might be able to get some folks to do reviews
<sorear> other people might think that using a fpga to do one kex per hour is silly
<azonenberg_work> sorear: well the point is more, i dont want any software in the code path at all
<azonenberg_work> also, down the road i want to do some hardware VPN endpoints and other fun stuff
<azonenberg_work> that could potentially do a lot more
<azonenberg_work> i also dont remember if i ever made an fpga aes implementation but i need one of those at some point too
<azonenberg_work> that's a lot easier to do right in hardware than software
<awygle> or meep
<azonenberg_work> because O(1) timing in hardware is so easy
<azonenberg_work> and timing side channels are the main weakness in software AES implementations
<sorear> a low-resource x25519 core is going to bear a strong resemblance to a cpu
<sorear> so it matters how you personally define "i dont want any software"
<azonenberg_work> i don't want any turing-complete processors that have the ability to perform i/o or affect state outside of their own self
<azonenberg_work> the crypto core should be a black box that just takes bytewise data in and out
<azonenberg_work> on some kind of streaming bus
<sorear> so in principle it wouldn't be a problem if the crypto core were literally a general-purpose cpu, as long as its inputs and outputs were limited to those of a crypto core
<azonenberg_work> At some point, i also want to implement my crypto-optimized CPU
<azonenberg_work> that i designed in principle here
<azonenberg_work> this is tuned for symmetric ciphers, though
<azonenberg_work> and hashes
<azonenberg_work> and uses a rather bizarre Y-shaped VLIW pipeline
<azonenberg_work> :D
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<cyrozap> Anyone know if there's an IRC channel for SymbiFlow? Or do they all just hang out in here and in #yosys?
<sorear> here/#yosys/#vtr-dev
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<cyrozap> Thanks, sorear!
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<mithro> Hey cyrozap
<mithro> cyrozap: Mostly here, #yosys and #vtr-dev
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<sorear> laksen is a #riscv regular, want them invited here?
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<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master:
<openfpga-bot> jtaghal/master 21823e2 Andrew Zonenberg: Added support for reading/writing ARM7TDMI ICE registers
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<rqou> cr1901_modern: look what i just found:
<digshadow> cyrozap: are you looking to work on something?
<sorear> is there something i'm missing in that image or did an '040 become noteworthy again at some point recently?
<zino> 040's have always been newsworthy. It's the CPU I dreamed about having as a teen.
<awygle> i was -1 when that was released
<awygle> or possibly UINT_MAX
<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master:
<openfpga-bot> jtaghal/master 3d48bb4 Andrew Zonenberg: Added more registers to ARMv8Processor
<awygle> huh TIL of IEE 802.3ap
<awygle> *IEEE
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<mithro> azonenberg_work / daveshah:
<azonenberg_work> mithro: what does this do different from iopadmap?
<azonenberg_work> ioapdmap takes inout wires and turns them into iobuf cells and input/output wires
<azonenberg_work> If you then delete the iobuf cells, you have in/out/oe wires only
<cyrozap> digshadow: ...I actually don't remember why I was asking about it (-_-')
<mithro> azonenberg_work: From what I can tell, it doesn't modify inner cells?
<mithro> azonenberg_work: Say, I have a cell A -> cell B which is an inout
<mithro> azonenberg_work: But maybe I'm doing it wrong
<mithro> azonenberg_work: Love a iopadmap command which does what I want
<mithro> I'm pretty terrible at Yosys...
<awygle> is there a fast unix-command-line way to make a file full of ones?
<azonenberg_work> ... oh
<azonenberg_work> i see
<awygle> usually i just dd if=/dev/zero but i need a /dev/one which doesn't exist lol
<azonenberg_work> so you want to turn *internal* tristates into muxes
<azonenberg_work> Not the pad ring?
<jn__> awygle: maybe tr </dev/zero '\0' '\377'
<jn__> (apply dd as needed)
<sorear> i'd do the tr yeah
<sorear> probably also stick on a LC_ALL=C, but that's probably unjustified paranoia
<awygle> TIL you can pipe to dd and leave off if
<awygle> sweet, thanks jn__!
<jn__> yep! if and of are optional
<azonenberg_work> welp, i have more stuff to fix next week i guess
<cyrozap> Why would you need dd? Can't you just ">" to a file?
<azonenberg_work> in particular, my current jtaghal code does not handle devices with invalid / nonexistent IDCODEs well
<jn__> cyrozap: to specify the size, maybe
<cyrozap> jn__: Ah, right.
<awygle> yup
<awygle> i needed exactly 32M
<jn__> sounds like an empty flash image :)
<sorear> head -c 32M
<awygle> whatever do you mean :p
<awygle> (that's exactly what it is)
<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master:
<openfpga-bot> jtaghal/master 1d75b77 Andrew Zonenberg: Added support for enumerating TAPs that do not support the IDCODE instruction
<gruetzkopf> the tegra X1 also contains a cortex A9 in addition to the A53/A57 big/little setup and the ARM7 boot processor
<azonenberg_work> it has an a9 too?
<azonenberg_work> interesting, i didn't discover that on my chain walk
<azonenberg_work> i wonder why i missed it
<gruetzkopf> yeah, near all the audio stuff
<azonenberg_work> might have a bug in my coresight descriptor parsing
<gruetzkopf> currently trying to poke it from the AP side
<gruetzkopf> audio is "interesting" in that soc (original res)
<gruetzkopf> (see page 1667 of the TRM for Audio processing engine)
<gruetzkopf> CoreSightTM interface to ADSP
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