<awygle>
azonenberg, when you come back: i would be interested in that, and thus i urge you to consider providing a C API
<awygle>
cyrozap: same
<cyrozap>
awygle: That's the plan.
<awygle>
cyrozap: i figured it would be but... you know. explicit is better than implicit :p
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<openfpga-bot>
[jtaghal] azonenberg pushed 1 new commit to master: https://git.io/fN4me
<openfpga-bot>
jtaghal/master aee303e Andrew Zonenberg: InitializeChain() now removes old instances so it can be called multiple times
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<azonenberg>
awygle: i'll probably make it a separate library
<azonenberg>
then have jtaghal link to it
<azonenberg>
as far as API, i havent gone that far yet
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<rqou>
azonenberg why do you _suck_ at APIs?
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<awygle>
God dammit how did I buy the only portable air conditioner brand with a non standard hose diameter
<qu1j0t3>
low tech drm
<Zorix>
just build an adapter
<zkms>
they don't call it duct tape for nothing
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<qu1j0t3>
watch Apollo 13 for inspiration
<awygle>
I might actually just duct tape it. I'm out of here in three weeks anyway.
<zkms>
(masking tape leaves less residue and you can get heavy duty masking tape pretty easily)
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<awygle>
i think i might just be doing something stupid. does anyone know how to attach the hose from a portable air conditioner to a hole/port in the wall of an apartment that is _clearly_ explicitly meant for such a thing?
<prpplague>
awygle: usually the portable AC is intended to fit into a window
<awygle>
na this is one of those upright ones with hoses
<prpplague>
awygle: yea, even those
<awygle>
it came with a window kit thing
<prpplague>
awygle: usualy comes with a window kit
<awygle>
but like, there's a 5" hole in my wall, with a plastic cover over it
<awygle>
a removable plastic cover, and it leads to a vent hood thing
<prpplague>
awygle: clothes dryer vent?
<awygle>
maybe but there's a clothes dryer in the place already on the totally opposite side of the apartment, also that would put the dryer in my living room
<prpplague>
awygle: ahh
<prpplague>
awygle: i would think you just need a piece of flexible duct work and a circle clamp
<prpplague>
awygle: that's what i use for my AC unit in my office
<awygle>
so i'm trying to picture that, and the issue i have with it is that there's nothing extending beyond the wall to circle clamp to
<awygle>
it's just a hole with a plastic sheathe, no extruding pipe
<openfpga-github>
Glasgow/master 7408bf1 whitequark: applet.i2c.eeprom: factor out of applet.i2c_master.
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<keesj>
tinyfpga: thanks!
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<prpplague>
keesj: i got box of three TinyFGPA BX on monday
<prpplague>
real happy with them for prototyping
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<tinyfpga>
Hey keesj, prpplague! Happy to hear you got your boards safely!
<awygle>
daveshah has me thinking about my ideal ecp5 board
<awygle>
and i think i really just want a compute module type of thing
<awygle>
almost like the tinyfpga ex but with a better solution for board-to-board serdes
<awygle>
i wonder what the SI would be like for high speed digital over castellated holes...
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<tinyfpga>
awygle: I think it’s better than through-holes
<awygle>
it'd almost have to be
<tinyfpga>
But it would be tricky for really high speed SERDES
<awygle>
but it's probably not a patch on like, SMP
<awygle>
SMP is a nonstarter though due to cost
<awygle>
and board area
<tinyfpga>
I’m not familiar with SMP
<awygle>
i don't really know how to figure it out though short of building something and measuring it
<awygle>
tinyfpga: SMP is a board-to-board RF connector good for up to ~40 GHz
<awygle>
there are also cables actually but originally it was for board-to-board
<tinyfpga>
Gotchya
<tinyfpga>
how many IOs do you need?
<tinyfpga>
What’s your size constraint?
<daveshah>
I would have thought one of the Samtec connectors would work
<tinyfpga>
A large pitch BGA or LGA would be cool
<tinyfpga>
FPGA, voltage regulators, decoupling caps, SPI flash all one one module
<awygle>
not that many, really. on the order of 32 or 64 depending on the project.
<tinyfpga>
I see
<awygle>
daveshah: like a QSH? yeah those would definitely work. cost again though, depending on what you're doing.
<awygle>
i don't really have a size constraint except "big multilayer boards on good processes cost money"
<awygle>
hm, could do something like a SO-DIMM maybe
<tinyfpga>
Yeah, that would be great
<tinyfpga>
Like the rpi compute module
<awygle>
but edge plating costs too... although ENIG is probably fine for a small number of mating cycles
<prpplague>
tinyfpga: the boards are working out well, i did have to make a mod to them by removing the 3V3 regulator and also wiring up the reset signal to my main board
<awygle>
so-dimm has the advantage of being a standard so less bikeshedding and potentially more interop
<prpplague>
tinyfpga: other than that i've been very happy with them
<sorear>
reasonable to use something like the 10ge physical layer?
<awygle>
tinyfpga: what's your cost target for the EX, if you don't mind the question?
<daveshah>
Yeah I'm curious too
<azonenberg>
awygle: whats wrong with WTH?
<azonenberg>
QTH*
<daveshah>
I would like to see $70-80, but I don't know if that's doable
<azonenberg>
how cheap of an fpga are you putting on this?
<awygle>
azonenberg: the Lattice ECP5 LFE5UM-25F-6BG381C sells for $12.78 in QTY 1 on Mouser
<daveshah>
Well, the cheapest ECP5 with serdes is $15 in one-off
<azonenberg>
wow
<azonenberg>
that is quite attractive for low cost designs
<awygle>
indeed
<azonenberg>
Any idea how far we are from an open toolchain for those? is anyone looking at that family yet?
<azonenberg>
(sorry, too many projects going on lol)
<awygle>
a single QSH is $6.28
<azonenberg>
and how many / how fast serdes?
<daveshah>
azonenberg: I will publish tools supporting LUTs, FFs and IOs imminently, given a bit of tidying up
<azonenberg>
daveshah: so fabric is close to usable but nobody is touching serdes yet
<daveshah>
A fully useful flow with SERDES, IOLOGIC, DSP, etc will hopefully be done by 2019
<awygle>
azonenberg: the one i quoted you has 2 3.2G serdes
<awygle>
you can get up to 5G by going up "speed grade"
<azonenberg>
awygle: 86 cents a pop on digikey for a sata connector
<awygle>
they're not fully independent though, they share clocking resources
<azonenberg>
one gtp each
<azonenberg>
It's a common low cost connector good to several gbps
<azonenberg>
you could easily make a breakout from that to sma, sfp, or whatever
<awygle>
azonenberg: nothing wrong with sata but it doesn't do board to board, does it?
<awygle>
i'd rather avoid fussing with cables if possible
<azonenberg>
Correct, it does not
<azonenberg>
most board to board connectyors with controlled impedance are $$
<awygle>
yep
<sorear>
Is there no “SATA type B” connector?
<awygle>
what does a so-dimm connector cost?
<awygle>
looks like $2.45 on mouser
<azonenberg>
sorear: no, sata is meant for cable to board exclusively
<azonenberg>
awygle: the issue is the mating connector is a giant pain
<sorear>
Oh I misunderstood the complaint
<awygle>
azonenberg: you mean the card edge connector, or the connector on the board?
<azonenberg>
The board connector
<sorear>
awygle wants PCB-PCB connections, like PCI or sodimm
<azonenberg>
Honestly if you want a cheap card edge connector pcie is an option
<azonenberg>
you can get them push-in, no soldering required
<azonenberg>
just friction fit with spring loaded pins
<awygle>
really? interesting
<awygle>
i was considering M.2
<azonenberg>
it's slightly rougher on the mating PCB than sodimm, you can get sodimm ZIF and pcie is going to scrape the board a bit
<awygle>
or mPCIe, things like that
<azonenberg>
so cheap ENIG may not last too many mating cycles
<azonenberg>
possible fix: make the card edge connector on the peripheral board and give the fpga a pcie socket instead
<azonenberg>
that way the (presumably cheaper) io board gets the brunt of the wear
<awygle>
just for completeness, if you want 4 3.2 Gbps transceivers it's $25.40, if you want 2 5 Gbps transceivers it's $18.20, if you want 4 5Gbps it's $30.95
* awygle
bbl to continue this discussion
<rqou>
whitequark: that's not the issue that i was told would happen to the ws2812s
<rqou>
i heard from bunnie that too long at high temperatures causes the die attach for the red led die to come apart
<rqou>
and then your led no longer has red
<sorear>
I’m imagining that awygle is putting N fpga boards in a cheap backplane?
<prpplague>
rqou: that happens very often with convection style ovens
<prpplague>
rqou: you don't see it as much with a good IR oven
<rqou>
idk, I've never experienced it
<rqou>
and i don't use too many ws2812s anyways
<prpplague>
rqou: what you do see in high humidity situations is the water vapor in the component explode
<azonenberg>
prpplague: why more with convection?
<azonenberg>
convection normally has more even heating than IR
<rqou>
anyways, protip to avoid hours and hours of frustrating rework: it turns out that 0402 pads are larger than BGA pads
<azonenberg>
sorear: that sounds like marblewalrus
<azonenberg>
rqou: meaning?
<azonenberg>
(and it depends on what bga)
<rqou>
and my "clever" decoupling capacitor placement can cause impossible to see shorts
<azonenberg>
lol
<prpplague>
azonenberg: good question, i never dug into the reason, it was more of an observed effect
<azonenberg>
did you not do DRC?
<rqou>
especially when the soldermask registration is maximally offset like in this batch
<rqou>
i did and figured it would be fine
<azonenberg>
So you were violating oshpark design rules and got bit? :p
<azonenberg>
also in a 1mm pitch bga there's a trick, you can use octagonal 0402 pads to clear vias better
<rqou>
i was focusing too much on the drc complaining that i overlapped the courtyard on the 45 degree rotated caps
<rqou>
it's not violating oshpark rules
<azonenberg>
oh so whats the issue?
<azonenberg>
got a pic?
<rqou>
essentially you can end up with a tiny bit of a via not covered by soldermask
<rqou>
which is right next to a pad for a passive
<azonenberg>
what soldermask expansion did you use
<prpplague>
azonenberg: i've just seen a lot more issues with LEDs and devices with exposed die have much more issues with convection ovens than with IR
<rqou>
no pic, it can only really be seen on a blank board
<rqou>
i don't remember what expansion
<azonenberg>
kicad's default is massive, i do 50 um
<prpplague>
azonenberg: time wise, IR oven heating cycles are much shorter, so i am assume that is the reason
<azonenberg>
(the defaults were set decades ago and pcb tech has moved on)
<rqou>
i think i did the oshpark recommended expansion for _2_ layer
<rqou>
which is slightly larger
<azonenberg>
idk i've just had really bad experiences with ir ovens and uneven heating, shadowing, etc
<azonenberg>
especially in batch ovens w/o conveyors
<azonenberg>
my convection oven will reflow big SMA connectors only a few seconds after 0402 passives
<rqou>
anyways, I'll probably switch to octagonal pads on future designs
<rqou>
which will definitely avoid this issue
<prpplague>
azonenberg: which over are you using?
* prpplague
is curious
<rqou>
azonenberg uses some food oven set to "cookies"
<prpplague>
rqou: i do like to bake LEDs and some other components for 30 minutes prior to running them on the pnp
<prpplague>
rqou: helps reduce the risk of vapor explosions
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<rqou>
sure, but i definitely wouldn't run the full MSL-3 bake
<prpplague>
rqou: yea, i usually just do 30 minutes at 125C
<azonenberg>
i only bake expensive parts if they've been open
<azonenberg>
cheap parts or stuff from sealed pakcs dont get baked
<prpplague>
azonenberg: for qty builds or just for small prototype runs?
<azonenberg>
Prototype runs, i dont do volume at home
<azonenberg>
I do R&D, not production
<prpplague>
ahh, makes sense
<prpplague>
no real need to worry about it for small qty
<azonenberg>
reworking one or two boards a year because one led died is NBD
<prpplague>
yea
<azonenberg>
Losing a $250 FPGA to a popocorn is
<prpplague>
exactly
<azonenberg>
if i was mass producing i'd also need to pick up a PnP :p
<azonenberg>
serious idea... get a small benchtop PnP and use it to place decoupling caps or something from reels, then place low-quantity parts by hand from cut tape so i dont have to pay for reels/trays
<awygle>
sorear: I was actually picturing boards with mechanical constraints, so they need to be physically large, but much of the board is empty or very low density
<awygle>
something like a PCIe NIC which is just a PCIe lane to an FPGA to an SFP or something but still has to be full length
<awygle>
With a compute module you don't have to pay for e.g. 6 layers for the whole boadd
<awygle>
tinyfpga: oh awesome, thanks!
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<azonenberg>
awygle: yeah i had thought about doing an fpga/ram/bootflash/gbe sodimm or other module for a while
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<azonenberg>
never got around to figuring out specifics
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<awygle>
yup
<awygle>
FPGA clusters are also awesome though
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<awygle>
Isn't that approx. what mlabs does?
<awygle>
In the specific context of instrument control?
<azonenberg>
to some extent yeah
<azonenberg>
re fpga clusters, marblewalrus
<azonenberg>
is another backburnered project :p
<awygle>
yup
<openfpga-bot>
[jtaghal] azonenberg pushed 1 new commit to master: https://git.io/fNBiV
<openfpga-bot>
jtaghal/master eed3e38 Andrew Zonenberg: Began adding Xilinx FPGA support for jtagsh. Moved some common APIs to XilinxFPGA class from derived classes
<openfpga-bot>
[jtaghal-apps] azonenberg pushed 1 new commit to master: https://git.io/fNBir
<openfpga-bot>
jtaghal-apps/master f1ec6ea Andrew Zonenberg: Initial version of jtagsh
<azonenberg_work>
So, this is a very early WIP and not even remotely useable yet
<openfpga-bot>
[jtaghal-cmake] azonenberg pushed 1 new commit to master: https://git.io/fNBiP
<openfpga-bot>
jtaghal-cmake/master a825aee Andrew Zonenberg: Initial jtagsh implementation, updated to latest submodules