futarisIRCcloud has joined ##openfpga
emeb has quit [Quit: Leaving.]
<Sprite_tm> Hey people, anyone know if it's possible to switch I/O types on the fly on an ECP5? I want a pin to be software-configurable as a 3.3V input/output as well as a LVDS input (for a makeshift ADC).
emeb_mac has joined ##openfpga
<Xark> Sprite_tm: In my experience, confuring that on the fly is somewhat rare. I don't see dynamic configuration of I/O from a quick scan of ECP5 SysIO Usage guide (https://www.latticesemi.com/view_document?document_id=50464)
<Xark> configuring*
freemint has quit [Remote host closed the connection]
freemint has joined ##openfpga
<sorear> I doubt it is *supported* but it may be *possible*
<Sprite_tm> Hm, maye I just need to fix it the evil way and connect two pins in parallel :)
etrig_ has joined ##openfpga
etrig_ has quit [Client Quit]
<sorear> there’s been a tiny amount of work on malformed bitstreams that overwrite a subset of frames
<whitequark> malformed?
<whitequark> hey.
mumptai_ has joined ##openfpga
<mwk> I'd say they are very well-formed
<Sprite_tm> Hm, so hacky partial reconfiguration?
<mwk> pretty much yes
<Sprite_tm> Intriguing :P but maybe a bit too cutting-edge for what I need.
mumptai has quit [Ping timeout: 240 seconds]
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
snappy has joined ##openfpga
<sorear> o/
OmniMancer has joined ##openfpga
henriknj has quit [*.net *.split]
lopsided98 has quit [*.net *.split]
GenTooMan has quit [*.net *.split]
flaviusb has quit [*.net *.split]
kmehall has quit [*.net *.split]
jfng has quit [*.net *.split]
yuriks has quit [*.net *.split]
azonenberg has quit [*.net *.split]
_whitenotifier has quit [*.net *.split]
whitequark has quit [*.net *.split]
florolf has quit [*.net *.split]
jeandet has quit [*.net *.split]
guan has quit [*.net *.split]
sensille has quit [*.net *.split]
pinoaffe has quit [*.net *.split]
diamondman has quit [*.net *.split]
jhol has quit [*.net *.split]
q3k has quit [*.net *.split]
pointfree has quit [*.net *.split]
awygle has quit [*.net *.split]
florolf has joined ##openfpga
whitequark has joined ##openfpga
q3k has joined ##openfpga
azonenberg has joined ##openfpga
guan has joined ##openfpga
jeandet has joined ##openfpga
yuriks has joined ##openfpga
diamondman has joined ##openfpga
GenTooMan has joined ##openfpga
lopsided98 has joined ##openfpga
henriknj has joined ##openfpga
jfng has joined ##openfpga
yuriks has joined ##openfpga
yuriks has quit [Changing host]
kmehall has joined ##openfpga
jhol has joined ##openfpga
flaviusb has joined ##openfpga
sensille has joined ##openfpga
pointfree has joined ##openfpga
_whitenotifier has joined ##openfpga
awygle has joined ##openfpga
pinoaffe has joined ##openfpga
Bike has quit [Quit: Lost terminal]
_whitelogger has joined ##openfpga
freemint has quit [Remote host closed the connection]
freemint has joined ##openfpga
futarisIRCcloud has joined ##openfpga
_whitelogger has joined ##openfpga
freemint has quit [Ping timeout: 250 seconds]
emeb_mac has quit [Ping timeout: 268 seconds]
Asu has joined ##openfpga
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
futarisIRCcloud has joined ##openfpga
rohitksingh has quit [Ping timeout: 245 seconds]
GenTooMan has quit [Quit: Leaving]
GenTooMan has joined ##openfpga
Bike has joined ##openfpga
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
<gruetzkopf> oh, neat ECP5 input "DDR" supports 1:7 ratio directly
lutsabound has joined ##openfpga
<whitequark> yep
freemint has joined ##openfpga
<ZirconiumX> https://puu.sh/EhuRC/61bb0e1d21.png <--- One kind of broken frame of PAL video
<ZirconiumX> Minus actual video
<ZirconiumX> And with broken d_hblank
emeb has joined ##openfpga
freemint has quit [Remote host closed the connection]
freemint has joined ##openfpga
freemint has quit [Remote host closed the connection]
freemint has joined ##openfpga
pie_ has joined ##openfpga
<GenTooMan> wow PAL video, that's blast from the past, I'm so used to HDMI component DVI or (whatever) now. Déjà vu that's from a simulation ZirconiumX?
<ZirconiumX> It is, yes, GenTooMan
<ZirconiumX> Unfortunately I've been struggling a little with the horizontal timings
<GenTooMan> I've done something similar only for an LCD 800x480 24bit. Are you using verilog or nmigen?
<ZirconiumX> nmigen
freemint has quit [Ping timeout: 245 seconds]
<GenTooMan> Well do you need the d_hblank signal? If you can generate d_hsync correctly, d_hblank is almost the same (just different numbers in the horizontal total).
cr1901_modern1 has joined ##openfpga
OmniMancer has quit [Quit: Leaving.]
cr1901_modern has quit [Ping timeout: 265 seconds]
<ZirconiumX> GenTooMan: it's a debugging signal (d_ prefix)
<ZirconiumX> But the real thing does need a hblank interrupt
<ZirconiumX> My code is trying to emulate a PS2 GPU
<ZirconiumX> Or at least the video portion thereof
Zorix has quit [Read error: Connection reset by peer]
<ZirconiumX> Here's it with fixed hblank
<GenTooMan> That does make more sense too me.
<tpw_rules> why os/2
<tpw_rules> ps2
<GenTooMan> however doesn't PAL generate 2 fields each having a vsync pulse? 40ms for a signal vsync is 25fps (frame per second) but PAL uses 50 fields per second.
<ZirconiumX> tpw_rules: why not?
<ZirconiumX> GenTooMan: The actual sync stuff is even more complex
<ZirconiumX> It's a pattern of 6 short syncs, 5 long syncs, then 5 short syncs on an even frame
<ZirconiumX> And 5 short syncs, 4 long syncs, then 4 short syncs on an odd frame
<ZirconiumX> However I'm mostly focusing on the bigger picture than the fine details
<ZirconiumX> Namely that my FPGA doesn't have a composite connector, but does have a VGA connector
<GenTooMan> ZirconiumX Well good thing the PS2 could generate component and VGA signals as well then? There are some reversed engineering details of the internals for the VDU's in the GPU around also. I doubt you want to implement a PS2 however in an FPGA.
<ZirconiumX> GenTooMan: It actually complicates things greatly that it can
freemint has joined ##openfpga
<GenTooMan> I won't bore you with PS2 details a lot of things were "different" about it it wasn't a bad design just complicated by the changing times it was introduced in.
<ZirconiumX> I probably know those details better than you do, GenTooMan
<GenTooMan> Won't be the firs time someone knows something I don't (won't be the last).
ZipCPU has quit [Quit: ZNC 1.6.4 - http://znc.in]
ZipCPU has joined ##openfpga
ZipCPU|Alt has joined ##openfpga
ZipCPU|Alt has quit [Client Quit]
rohitksingh has joined ##openfpga
rohitksingh has quit [Ping timeout: 245 seconds]
rohitksingh has joined ##openfpga
Jybz has joined ##openfpga
cr1901_modern1 has quit [Quit: Leaving.]
cr1901_modern has joined ##openfpga
_whitelogger has joined ##openfpga
finsternis has quit [Excess Flood]
finsternis has joined ##openfpga
Jybz has quit [Quit: Konversation terminated!]
emeb_mac has joined ##openfpga
Asu` has joined ##openfpga
futarisIRCcloud has joined ##openfpga
Asu has quit [Ping timeout: 276 seconds]
Asu` has quit [Ping timeout: 240 seconds]
Asu` has joined ##openfpga
gnufan_home has joined ##openfpga
lovepon has joined ##openfpga
* Xark has Sony PS2 Linux Kit that came with VGA cable. Finiky about what monitors worked (needed sync on green or something like that). I had a Sony one that worked. :)
Asu` has quit [Remote host closed the connection]
<ZirconiumX> Xark: Yeah, it's awfully convenient that Sony picked a synchronisation method that worked best with Sony monitors
rohitksingh has quit [Ping timeout: 264 seconds]
gnufan_home has quit [Quit: Leaving.]
rohitksingh has joined ##openfpga
rohitksingh has quit [Ping timeout: 245 seconds]
rohitksingh has joined ##openfpga
<cr1901_modern> According to the gdb manual, "target remote $HOST" is supposed to start a session where once you disconnect, the gdb server quits. >>
<cr1901_modern> Can anyone else w/ a copy of openocd and a target to debug confirm that if you do "target remote $HOST" and quit, openocd keeps the gdb server open?
mumptai_ has quit [Quit: Verlassend]
emeb has quit [Quit: Leaving.]
lutsabound has quit [Quit: Connection closed for inactivity]