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<cr1901_modern> https://twitter.com/securelyfitz/status/1177285645863026688 I'm vaguely aware that NEMA sucks as a plug/outlet standard, but this is aesthetically upsetting to me
<cr1901_modern> damnit, wrong tweet
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<pepijndevos> How can I use the SRAM on the ice40?
<pepijndevos> And can I force Yosys to use DFF for ROM?
<whitequark> SRAM or SPRAM?
<mwk> DFF for ROM?
<pepijndevos> whitequark, the one yosys doesn;t infer
<pepijndevos> mwk, I mean, LUT
<pepijndevos> Or whatever logic it wants to use
<pepijndevos> Basically if I can fit my framebuffer in the SPRAM and the tile ROM in LUTs, it might work
<pepijndevos> But... I should probably just give up on HDMI
<whitequark> SPRAM has to be instantiated
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<GenTooMan> having poked (and hoped) for a while I have found 2 examples for using a PLL with nmigen whitequark glasgow (https://github.com/GlasgowEmbedded/Glasgow/blob/master/software/glasgow/platform/ice40.py) and kbob (https://github.com/kbob/nmigen-examples/blob/master/apps/pll-blinker/pll-blinker.py) anyone know of others?
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<adamgreig> GenTooMan: i use it on my stuff, sec
<adamgreig> think that code is slightly out of date for nmigen master, i've updated the version for work stuff but not that one
<GenTooMan> thanks adamgreig I appreciate that. For some reason what I have done ends up with yosys optimizing everything away. I just trying to figure out what I did wrong (this time).
<adamgreig> probably not using the output
<adamgreig> happy to look at yours and see if i can spot anything obvious. i also often have whole elaborate circuits optimised to nothing
<GenTooMan> adamgreig I've tried 3 different ways so any one was likely wrong. I do need to start committing code so I don't forget (or loose) what I have done. bad habit that.
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