lekernel changed the topic of #milkymist to: Milkymist One, Migen, Milkymist SoC & Flickernoise :: Logs: http://en.qi-hardware.com/mmlogs :: EHSM Berlin Dec 28-30 http://ehsm.eu
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<azonenberg> wpwrak: yes, that is annoying
<azonenberg> i understand the need for load balancing
<azonenberg> but that can be done server side
<azonenberg> wolfspraul: also, initial UI mockup for the control panel http://i.imgur.com/xGozm.png
<azonenberg> kristianpaul: *
<azonenberg> you'd use this to dial in what signals you're watching (a future, more advanced version may be able to parse HDL but thats a much longer term project)
<azonenberg> then specify trigger conditions
<azonenberg> then hit the "start" button
<wpwrak> i think they don't do it for load balancing but for page impressions
<azonenberg> once the trigger condition occurs, it'll launch gtkwave with the data of interest
<wpwrak> next step: protocol decoding :)
<azonenberg> wpwrak: thats up to gtkwave
<azonenberg> make a plugin for it
<azonenberg> my job is just to get data from the board into a .vcd file
<azonenberg> and launch $VCD_VIEWER (currently gtkwave) to render it
<wpwrak> ah, gtkwave can do such things ? didn't know that
<azonenberg> I dont know if it can
<azonenberg> what i do know is, that's beyond the scope of the LA
<azonenberg> i'm doing capture and transport
<wpwrak> ;-)
<azonenberg> not the presentation layer
<wpwrak> at some point, you may want to add protocol triggers ...
<azonenberg> Good point
<azonenberg> Thats a much longer term project though
<azonenberg> The trigger systm i have now is adequate for catching the single bug i'm developing the tool for
<wpwrak> do you stream to DRAM ? or just keep it in the tiny FPGA memory ?
<azonenberg> once i have it finished to the point that i can use it, i'll then use it to catch my bug
<azonenberg> Right now, i use four block RAMs
<azonenberg> each 32 bits wide x 512 bits deep
<azonenberg> to get 128 channels x 512 samples
<wpwrak> that's not a lot :-(
<azonenberg> You could make it deeprr
<azonenberg> remember this is better than a normal LA for fpga stuff since you are capturing on a clock
<azonenberg> so you dont need to oversample unless you're looking for glitches
<azonenberg> so 512 samples = 512 clocks
<wpwrak> the very shallow sample memory is a problem of all those cheap fpga-based LAs
<azonenberg> This isnt meant to replace a conventional LA
<azonenberg> this is meant to replace chipscope
<azonenberg> and i cant stream to dram
<azonenberg> for one very simple reason
<wpwrak> yes, but if you want to analyze protocols, you need a lot of samples (and/or good idle detection)
<azonenberg> i'm trying to fix a bug in my dram controller
<azonenberg> using this tool :p
<wpwrak> heh ;-)
<wpwrak> i see the catch 22 :)
<azonenberg> So block ram is a necessity lol
<azonenberg> a dram based back end is a possibility for a future version
<azonenberg> as a plugin
<wpwrak> maybe you can extend it once the dram bug is fixed :)
<azonenberg> i want to make it highly modular
<azonenberg> i'm already setting it up so the PC interface is modular
<azonenberg> the interface implemented right now is a uart at 500kbps but that can be swapped out with usb, ethernet, jtag, etc potentially
<azonenberg> though uart is the only one i'm implementing in the short term
<azonenberg> 64 kbits * 500kbps = fraction of a second
<azonenberg> so its not a bottleneck
<azonenberg> you could always use more block ram too
<azonenberg> but this is meant to be a minimally invasive debugging solutoin
<azonenberg> that you can throw in almost anywhere
<azonenberg> the current system including a 32-bit counter (my DUT) and the UART
<azonenberg> uses less than 100 spartan6 slices and four block rams
<wpwrak> yeah. i'm more after a general LA. deep memory, and a speedy link to the host. with M1, we have everything one would need to make such a critter.
<azonenberg> wpwrak: yeah
<azonenberg> And i want to do something like that TOO
<azonenberg> But my goal right now is to make something useful for fpga debugging
<azonenberg> where you can't simulate for some reason
<wpwrak> sure. one piece at a time :)
<azonenberg> and you dont want to break out to GPIOs and hook up to a regular LA
<azonenberg> either for lack of GPIOs or lack of a LA or whatever
<azonenberg> or in my case lack of a sufficiently fast LA
<wpwrak> yup. an integrated LA is certainly good to have
<azonenberg> So i dont wnat to have for example super sophisticated triggering systems
<azonenberg> as that would either make it slower or bigger
<azonenberg> both are counterproductive in this case
<azonenberg> i also dont want it so complex i have to spend a long time debugging it
<wpwrak> so you're not taking the zen approach :)
<azonenberg> which is that?
<wpwrak> "the way is the goal"
<azonenberg> This is a tool, not one of my main projects
<azonenberg> a necessary step on the road toward world domination is to be able to debug your robot army :p
<wpwrak> that's a good point
<kristianpaul> azonenberg: nice
<kristianpaul> tought i personally will follow a simpler aprouch
<azonenberg> kristianpaul: how so
<kristianpaul> like just logging the uart to a log
<azonenberg> Oh
<azonenberg> This is meant for raw data dumps though
<azonenberg> and it captures in real time at high speed and then dumps slowly
<kristianpaul> but yeah i recalled that
<kristianpaul> remenber*
<azonenberg> and integrates nicely with gtkwave for plotting signals :)
<azonenberg> sure, there are other ways to solve the same problem
<kristianpaul> yes sure
<azonenberg> but i think this one will work well for a lot of applications
<kristianpaul> and is okay, i like gtkwave at the end
<kristianpaul> sure it is
<kristianpaul> well i'll just need 3 channel
<azonenberg> Lol well i'm trying to debug a memory bus
<kristianpaul> i know :)
<azonenberg> so i have ~25 bits of address, 32 of data, and a few other things
<kristianpaul> yeah i can imagine
<azonenberg> might find that interesting
<wolfspraul> azonenberg: nice project indeed, good luck with polishing/blog etc! You may want to tell the sigrok folks about it (sigrok.org). do you know sigrok? they have different hw&sw right now, mostly, but they might be interested in your LA.
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<azonenberg> wolfspraul: no, i dont know them
<wolfspraul> it's led by our good friend Uwe Hermann in Germany, and I hope they stick to it for a while and make the software really solid
<wolfspraul> these are just little toys right now, maybe good for serial, low-speed usb, etc. your LA comes from a different level :-)
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<lekernel> ah, I just proposed sigrok as well :)
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<lekernel> wpwrak: do you think kicad would be good enough for the whole m^3 board (schematics+routing)?
<wpwrak> schematics certainly, yes. routing, no sure. i haven't done any multilayer (> 2) work with it yet. some people have and their results don't look all bad, though.
<wpwrak> so i think it would be at least worth trying. you also have "Freeroute" as a fallback option
<lekernel> worth giving it a try then?
<wpwrak> yeah, that one
<lekernel> huh, weird one
<wpwrak> ugly SaaS
<wpwrak> but it seems to work okay. tried it a bit a long time ago
<wpwrak> someone should write a proper open source router for kicad. kicad helps with manual routing (DRC while you draw; "magnetic" off-grid points), but it's still relatively painful work
<wpwrak> thanks to adam, we now also have a fairly sizable symbol and footprint library. still needs a bit of ordering, though.
<lekernel> good
<lekernel> I think we have some chance of completely getting rid of the ugly altium finally :)
<wpwrak> yeah. that will be a day worth celebrating :)
<wpwrak> have you looked at the kicad schematics adam made for m1r4 ? they're very clean. much nicer than the altium version.
<lekernel> yes, I had a look at them. and I share your opinion
<lekernel> that's why I'm looking forward to a 100% kicad m^3
<wpwrak> excellent :)
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<qi-bot> The MMU firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120616-1504/
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<Fallenou> hehe nice auto build :)
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<GitHub173> [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/bde8361e193038f07dff94398ac9fb8e06186c30
<GitHub173> [migen/master] flow: insert combinators and infer plumbing layout - Sebastien Bourdeauducq
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<GitHub161> [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/5c139511e888218731c59a4a51248a13683197db
<GitHub161> [migen/master] examples/flow/arithmetic: simulate - Sebastien Bourdeauducq
<GitHub187> [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/c1450daa93ac2013115635841b3a7d49a9452c94
<GitHub187> [migen/master] flow: insert splitters - Sebastien Bourdeauducq
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<GitHub126> [migen] sbourdeauducq pushed 7 new commits to master: https://github.com/milkymist/migen/compare/c1450daa93ac...21eb17fc3621
<GitHub126> [migen/master] examples/flow/arithmetic: cleanup - Sebastien Bourdeauducq
<GitHub126> [migen/master] flow/actor: add single_sink/single_source retrieval methods - Sebastien Bourdeauducq
<GitHub126> [migen/master] flow/actor: fix busy signal generation for pipelined actors - Sebastien Bourdeauducq
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