<GitHub141>
[board-m1/master] added 'PowerTree' for pdf generation - Adam Wang
<cladamw>
(R60/R61) wpwrak, hi these two DNP resistors I'd like to remove them. R61(DNP) has been designed since rc1 and there's no issues on this as I know. R60(DNP) is from rc3 for eliminating reset/nor corruption issue. How do you think ?
<wpwrak>
lemme see ...
<wpwrak>
R60 definitely yes. even if we wanted a pull-anything there, it would be pull-down.
<wpwrak>
R61, hmm ... do you remember the pull-up strength in the FPGA ?
<cladamw>
like uA-class, letmme check ...
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<cladamw>
no, from actual measured current to 3V3 through 100 ohm, they are for example TP37 (RP#, 16mA), TP36(reset pin out, 19mA), INIT_B_2 (24.7mA)
<wpwrak>
that doesn't sound like pull-up :)
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<cladamw>
yeah ... :-)
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<wpwrak>
ah, here we are .. DS162, page 5. 200-500 uA
<cladamw>
yes, that's Irpu, you found it. :-)
<wpwrak>
so about 10 kOhm. R61 is thus unnecessary, too.
<cladamw>
do we need also check U9.STS pin ?
<wpwrak>
it's open-drain
<cladamw>
i guessed that R61 was being added a pull-up since its datasheet said it needs a pull-up there. :-)
<cladamw>
page 14
<wpwrak>
we have the pull-up in the fpga :)
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<cladamw>
see also page 15 for note 6, but i think fpga in a mode with pull-up ability, no ? so a flash chip is in "pulled up by an external pull up resistance ≈10k) when the WSM is not busy, in block erase suspend mode (with programming inactive), program suspend mode, or reset power-down mode."
<wpwrak>
and it's strong enough. even if we configure the nor to pulse mode, it has plenty of time to ramp up.
<cladamw>
so even if we know fpga inside has pull-up, ha ~ but i don't know 'when' it's being acted. :-)
<wpwrak>
the pull-up in the fpga is enabled in the configuration we use
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<cladamw>
so can i say once fpga has been reconfigured then flash chip jumps into 'no-pull up' need status ?
<cladamw>
well ... i don't quite figure out that true answer why it is though. :-) but from results since rc1, we can remove it. :-)
<wpwrak>
when configured, the fpga provides the external (from the NOR's point of view) pull-up
<wpwrak>
and before it's configured, it doesn't care about status (see UG380, page 48)
<cladamw>
so this means that if we are not using fpga that possesses pull-up ability ans used a microprocessor. we still need to check carefully on the initial and/or default once power-up on mcu side.
<cladamw>
s/ans/and
<wpwrak>
but our requirements may be more relaxed. i don't see flash_sts being used anywhere in the core. so we don't really know if it works.
<wpwrak>
yes, if you make radical changes to the circuit, there will be many things that need checking ;-))
<cladamw>
you means you didn't find 'any' sts pins in fpga ? :-)
<wpwrak>
oh, i see it in boards/milkymist-one/synthesis/common.ucf and boards/milkymist-one/rtl/system.v
<cladamw>
wpwrak, alright, thanks for chats on it. :)
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<wpwrak>
my pleasure :)
<cladamw>
wpwrak, about flash_sts.ps, how did you know to use R1 = 0.1 ohm and C1 for 12pF ? I see a Cin for DIE input capacitance at the pad max. is 10pF in DS162, so you added a rough 2pF for stray capacitance, correct ?
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<wpwrak>
oh, i used maximum in and out capacitance of the NOR (5+7 pF)
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<wpwrak>
10 pF is a bit more. so let's make it 15 pF. yeah, a bit uglier.
<wpwrak>
R1 (0.1 Ohm) is simply to give qucs some resistance. it doesn't like circuits that are too "ideal".
<wpwrak>
the value of R1 is not critical. it pretty much works the same with R1 = 100 Ohm.
<cladamw>
oh ~ when doing a simulation, we'd better to take consideration on both side circuits, theoretically right ? so this simulation, C1 is more like in total: (Cinput + Coutput, 12 pF) for STS pin + (Cin, 10pF) for fpga + (stray cap., said 2~3pF), am I right ? )
<cladamw>
(R1) i see, tks. :)
<wpwrak>
(cap) on the NOR side, you only need Coutput = 5 pF. i used the NOR's Cin as an approximation for the FPGA, because i was too lazy to look up that one.
<cladamw>
oh ~ no problem, I was just tried to realize how those values being picked when learning simulations in Qucs. :-) so it's typically for NOR side simulation. :)