<cyrozap>
Hey all, haven't really been paying attention to this stuff in a while, so I was just wondering, have there been any developments with Spartan 6 bitstream RE in the past few years? I'm aware of the one where they did stuff with the LX9, but I was wondering if anyone had started a larger-scale prjxray type of RE effort for the 6-series Xilinx parts.
<cyrozap>
Hey all, haven't really been paying attention to this stuff in a while, so I was just wondering, have there been any developments with Spartan 6 bitstream RE in the past few years? I'm aware of the one where they did stuff with the LX9, but I was wondering if anyone had started a larger-scale prjxray type of RE effort for the 6-series Xilinx parts.
2021-01-24
<mithro>
LoneTech: As kc8apf we did add a bunch of support to the fasm / prjxray tooling for Spartan 6 because it was so similar to the series 7 and ultrascale stuff
2020-11-08
<tnt>
I'm not aware of any equivalent for Spartan 6 that's usable.
<clever>
have there been any advances in icestorm, to support chips like `Spartan 6 XC6SLX9` ?
2020-10-12
<Zorix_>
I haven't created a created a multi part symbol, only one I ever used was for a spartan 6, which was already made, and logically divided into power, configuration, and banks, so that worked for me
2020-09-03
<awygle>
do we have any tools for reverse engineering Spartan 6 bitstreams?
2020-05-28
<Zorix>
worked with xilinx spartan 6 for a bit, but I have some ideas for using really small fpgas in some projects and I figured if I can get one with an open tool chain it would be even more ideal
2020-04-19
<mwk>
... still have my chance with spartan 6
2020-02-09
<mwk>
daveshah: so I just got badly burned by a hold time violation on spartan 6
2020-02-06
<mwk>
but technology-wise, spartan 6 is a dead end, and spartan/artix/kintex/virtex 7 are all very close successors to virtex 6
2019-12-18
<Zorix>
i have had issues with an ftdi cable for jtag.. had to add inline resistors to make it work for loading a bitstream to a spartan 6
2019-12-15
<mwk>
hmm, Virtex 6 has the same weird async high address bits collision behavior as Spartan 6
<mwk>
Spartan 6 READ_FIRST sounds hilariously bad
2019-10-30
<mwk>
eg. viertex 2, spartan 3*, spartan 6
<mwk>
*cough* spartan 6 tile naming *cough*
2019-10-14
<freemint>
I am so keen on spartan 6 because an OS project i work uses them.
<nats`>
I would say give up on spartan 6
<mwk>
"windows 10" supports all spartan 6 and only that; the proper linux version supports many different familiies, but only smol FPGAs
2019-08-23
<mwk>
and it's on Spartan 6, where bitstream isn't even 32-bit oriented in the first place
2019-08-19
<mwk>
the spartan 6 datasheet mentions max frequency as low as 12MHz if you intend to readback block RAM contents using ICAP/selectmap
<mwk>
ZipCPU: maybe you're thinking of Spartan 6? that one seems to have a 50MHz limit for some config-related clocks
2019-08-06
<mwk>
oh, and my favorite part of spartan 6 has to be the low-power version
<mwk>
oh, and in case you want another reason why spartan 6 is batshit insane
<mwk>
but on Spartan 6 it's... kind of the wrong level to enable secure partial reconfiguration
<mwk>
cannot do it on spartan 6, because it doesn't support MAC
<mwk>
oh, that's part of the fun of spartan 6
<mwk>
and as for other things wrong with spartan 6
2019-07-02
<mkdir>
hi friends, does anyone happen to have a papillio pro spartan 6
2019-06-25
<mkdir>
so really it's the nextpnr that does not have compatibility with Spartan 6
<emeb>
A lot of the fat in ISE is not needed for just doing Spartan 6 work.
<mkdir>
is there a free verilog synthesis tool for Xilinx Spartan 6? ISE is a big boii
2019-06-18
<mkdir>
Sprite_tm have you tried any spartan 6 dev boards?
<mkdir>
as long as papillio is okay, that's fine. I wanted the spartan 6 microboard, but I can't find it anywhere anymore
<mkdir>
out of curiosity what are the best dev boards for spartan 6? is the papillio pro fine
<mkdir>
maybe i'll get both, how do these compare to spartan 6, just curious?
<tnt>
ISE is also on linux ... (for spartan 6).
<mkdir>
have a papillio pro (spartan 6)
2019-06-12
<Zorix>
paste flux saved me from the mess i made with a spartan 6 144 pin surface mount disaster
2019-02-17
<ZipCPU>
A CPU with everything on it (DMA, pipelined, i-cache, early branching, divide, multiply, SD card support, etc.) costs (on a Spartan 6) about 5176 LUTs
2019-01-23
<ZipCPU>
q3k: And here I thought getting a multiprocessing ZipCPU running on the Spartan 6-LX9 was a challenge
2019-01-21
<mwk>
for spartan 6
2019-01-17
<G33KatWork>
mwk: btw, my offer from 35C3 still stands - if you need test devices, I'll send some boards over. I'm drowning in Spartan 6 boards
2019-01-11
<nats`>
and with that you can really make a lot more than spartan 6 at same price
<landley>
But he's got all the IP. Except enough time has passed he doesn't want to use spartan 6 anymore, he wants to redo it with artix.
2018-08-31
<mkdir>
altera and xilinx are the only worthy starters right? btw long ago i used the spartan 6
2018-08-12
<rqou>
ah, spartan 6
<ZombieChicken>
Spartan 6
2018-08-11
<f003brv>
All good. I'm just learning and having fun. Are there openfpga tools for Spartan 6 that work on Mac?
2018-08-03
<rqou>
many people have poked at spartan 6 and only wrote down half the stuff :P
<rqou>
if you want to actually work on E (spartan 6 RE) you should read my slide deck
<rqou>
task E: reverse engineer the spartan 6 bitstream
<rqou>
if you've been around for way too long, you'll know that many many people have touched spartan 6
<rqou>
f003brv: reverse engineering the bitstream format for xilinx spartan 6
2018-06-12
<comietek>
i’m not clear on how much power a Spartan 6 can actually use
<comietek>
let’s say Spartan 6 or later
2018-06-07
<f003brv>
Does the Sparten 7 architecture change much compared to Spartan 6?
<f003brv>
I also went with Spartan 6 because of the papillio-pro
<f003brv>
but I was just curious if there are better FPGA's to learn since I'm going to have to do that anyway with the Spartan 6
<f003brv>
that I have ran on an embedded system. I'm sure a Spartan 6 is fine for that
<awygle>
f003brv: the spartan 6 is possibly not the best place to start, as Vivado, xilinx's newest tool suite, doesn't support it. as far as what might be better, what are your goals?
<f003brv>
I have the Spartan 6 atm, is that a good FPGA to learn or are there betters?
<f003brv>
Cool thanks I am. I have a Spartan 6 at the moment
2018-06-04
<sorear>
I’m pretty sure I’ve heard of both spartan 6 and 3
2018-06-03
<daveshah>
kc8apf: I think the ECP5 is a good spartan 6 replacement in terms of performance/size/price tradeoff
2018-04-29
<felix_>
mithro: hm, i wonder why do you want to make a new board with a spartan 6 on it?
2018-04-23
<awygle>
looks like there's a spartan 6 and an AM3352 in the siglent sa that i have
2018-03-18
<ZipCPU|Laptop>
See https://github.com/ZipCPU/wbicapetwo Designed to work with 7-series devices, includes (untested) code for Spartan 6's as well.
2018-03-06
<mithro>
tinyfpga: You should also now have a board for each of the major Xilinx parts I care about, Spartan 3, Spartan 6 and Artix 7
2017-04-09
<nats`>
hehe my eye python script work and I think I found a proof of metastability on my spartan 6 :)
2017-04-02
<nats`>
azonenberg I have trouble to find bufg and ibuf delay in the spartan 6 DS
2017-03-17
<pointfree>
I posted vjp's Spartan 6 RE and fpgalivereprog all over reddit and few people cared. I think he indicated to me that this is why he kinda stopped working on it.
<rqou>
there was some initial work done for Spartan 6 and 7-Series bitstream RE
2017-02-15
<dingbat>
"numbers" meaning...? If you mean LUT size, yes, it seems they have the same LUT arch. But that doesn't mean they have the same CLB arch. For instance, Artix 7 doesn't have SLICEXs like the Spartan 6
<cr1901_modern>
Erm, Artx 7 15 to Spartan 6 LX9 lol
2017-02-11
<nats`>
today I'll put my pcie spartan 6 board in my computer :)
2017-02-07
<nats`>
is there a clean way to output the jtag chain of a spartan 6 using BSCAN primitive ?
2017-01-01
<cr1901_modern>
Are the LUT archs the same between artix 7 and spartan 6?
<cr1901_modern>
I thought the smallest artix was quite larger than the smallest Spartan 6, tbh
<cr1901_modern>
azonenberg: A good metric I've heard is that ice40hx8k is approx a Spartan 6 LX5
<clifford>
azonenberg, looks like nobody has made iCE40 die photos so far. process node is similar to spartan 6 and that one is on siliconpr0n. how big of a project would it be to make die photos of iCE40 HX1K and/or HX8K?
2016-12-18
<cr1901_modern>
A Spartan 6 can't do this because?
<cr1901_modern>
ice40 8k I've heard described as a "Spartan 6 LX5" if such a thing existed.
2016-11-09
<diamondman>
I am having trouble finding details on the shutdown sequence of the spartan 6 series. I am able to program a spartan 6 using the 'shutdown sequence' of the spartan 3/E (It even looks like it works without manually running instructions to clear the CRC). But I would prefer to know the shutdown sequence of the 6.
2016-10-22
<diamondman>
am expecting some spartan 3 and 6 support within a week, and then I can do more hardcore benchmarking against digilent Adept's software and Xilinx's iMPACT tool.
2016-10-21
<diamondman>
Note that the initial wupport is the ability to talk to their onboard controllers and run boundary scan. Drivers for the actual chips to program them have to be built. Luckily I am working on drivers for the Spartan 3 and 6 series that should be pretty light weight and portable