01:46 <mithro> ZirconiumX: ping?

01:46 <mithro> ZirconiumX: what is your preferred email address? I would like to send you an email

02:18 <omnitechnomancer> pepijndevos yes I am OmniMancer

02:22 <omnitechnomancer> SpaceCoaster I am working on pushing the work I have done so far to my project tang GitHub fork, I think there is enough done for basic logic and flip flop use in the plbs and most of the routing, I have had a blinky working on the board using the vendor tools to generate the bitstream since I haven't gotten fuzzing for IOBs started yet

03:03 <SpaceCoaster> omnitechnomancer: sounds good. The Vendor tools are linux based so that isn’t too painful.

03:03 <omnitechnomancer> They work on windows too afaik but I have been using a Linux VM

03:09 <SpaceCoaster> I use a Mac and virtual box Linux VM. If I run a Windows VM I usually get bored before it has finished updating and I turn it off. Linux works for me.

03:09 <tpw_rules> lol there's a windows VM that's a key part of processing stuff. i had to block it from the internet to finally stop it from updating and rebooting in the middle of jobs

03:48 <omnitechnomancer> I use Windows but have been using a virtual box Linux VM for this

06:17 <OmniMancer> one thing I do need to do is make sure the html is correct for the hierarchial one I copied from trellis, currently it still talks about project trellis and ECP5s

08:17 <ZirconiumX> mithro: it's on my GitHub, same username

08:29 <anticw> SpaceCoaster: win10 has a linux subsystem that seems to work for a lot of people, have you tried that?

10:32 <omnitechnomancer> not sure how WSL interacts with libusb

10:50 <tnt> it doesn't

10:58 <ZirconiumX> Yeah, USB stuff has to be native Windows

10:58 <daveshah> I'm sure I heard microsoft were planning on adding USB support to a future WSL

10:59 <ZirconiumX> Possibly WSL2

10:59 <ZirconiumX> Which is just Linux at this point.

11:02 <omnitechnomancer> I'm sure they could do some kind of abomination to let you use the windows build of libusb with the winusb driver via the linux syscall interface somehow :P

11:29 <sorear> iirc the last time this came up we talked about using a win32-subsystem process to wrap winusb and provide an ipc interface

12:07 <zignig> whitequark: nice work with cxxrtl, have you tried your Boneless yet ?

12:35 <tnt> Anyone knows what the range of DELAYF is ? (how many steps and how much time it represents ?)

12:37 <daveshah> tnt: it varies on speed grade, it's about 20-40ps per step and 128 steps total afaik

12:37 <daveshah> I don't think it's officially specified on purpose as it isn't intended to be exact

12:38 <omnitechnomancer> what is a DELAYF?

12:39 <tnt> daveshah: yeah sure, just wanted a to have a rough estimate of the range of delay

12:39 <sorear> ecp5 primitive for an analog delay line in the IO cell

12:40 <omnitechnomancer> Ah yes

12:40 <sorear> hint: Lattice likes to stick incrementing letters on the end of primitive names, they're up to JTAGG

13:45 <omnitechnomancer> If anyone is interested here is what I have pushed so far for prjtang https://github.com/TechnoMancer/prjtang/tree/libtang-dev has AFAIK all the groundwork in libtang for fuzzers, now I just need to publish the fuzzer framework ported from trellis and the fuzzers I have so far

14:28 <OmniMancer> mmicko: ^^^

15:24 <pepijndevos> omnitechnomancer, super!

15:27 <OmniMancer> Hmm I accidentally put some stuff in a commit I didn't mean to, should I just force update the branch?

15:30 <daveshah> Yes, particularly if it is large

15:30 <pepijndevos> Sure, as long as no one is actively working on a PR against your branch hehe

15:31 <OmniMancer> It is small but untidy, the change to devices.json and environment.sh got folded into the change I made to silence the tool wrapper by default

15:34 <SpaceCoaster> OmniMancer: before I spin up a vm, which flavor of Linux are you using?

15:49 <OmniMancer> SpaceCoaster: kubuntu, but it shouldn't matter as long as you can install the same deps that libtrellis needs

15:50 <OmniMancer> I have corrected the untidyness

15:53 <OmniMancer> SpaceCoaster: some manner of debian or ubuntu will likely suffice

16:33 <OmniMancer> I am working through comitting the various fuzzers I already have.

16:36 <OmniMancer> daveshah: what does RAMW mode mean for PLC2 slice C?

16:37 <daveshah> It is the write port pass through for distributed RAM

16:37 <daveshah> The slice inputs form the write port for the bottom two slices

16:38 <OmniMancer> ah okay, I suspect the same happens in the Eagle

16:38 <OmniMancer> since I have observed this mode in lslices

16:39 <OmniMancer> I think it might not generate bits for it without some other stuff setup though, so it may be difficult to fuzz

16:52 <daveshah> For ECP5 it's just one bit that enables dram mode for all three slices

17:05 <OmniMancer> ah okay, that would probably be the same then

17:05 <OmniMancer> there is one bit which setting the dpram mode on either mslice causes to be set

17:07 <OmniMancer> At some point in the future I want to make a python module to simplify generation of the various input, output, local and interconnect wire names for doing the routing fuzzing, currently there are a bunch of repeated for loops with each fuzzer just copying the ones it needs

17:36 <OmniMancer> SpaceCoaster, daveshah: here are the fuzzers I have so far that actually do anything, https://github.com/TechnoMancer/prjtang/tree/fuzzing

17:51 <ZirconiumX> mithro: Something I should mention is that I prefer talking over IRC to email.

18:11 <daveshah> OmniMancer: nice!

18:15 <OmniMancer> daveshah: I think I need to study the RoutingGraph thing in libtrellis and figure out some the global resources stuff

22:35 <mithro> ZirconiumX: what timezone are you in?

22:36 <mwk> mithro: UK

22:44 <ZirconiumX> UK; it's 10:44pm

22:45 <ZirconiumX> mithro: ^

22:45 <mithro> ZirconiumX: just writing you an email now

22:49 <mithro> ZirconiumX: You should have an email now

22:55 <ZirconiumX> mithro: indeed I do, give me a bit to think.

22:59 <kc8apf> why did PicoEVB choose yet another incompatible way to hack together a JTAG interface?

23:00 <kc8apf> and do we really have so few tools that write a Xilinx .bin to the configuration SPI flash via the FPGA?

23:01 <daveshah> FWIW, the ULX3S also uses one of the FTDI FT23x chips

23:02 <daveshah> I think emard was working on openocd support for them but I can't remember if it was upstreamed or not

23:03 <mithro> ZirconiumX: I'm around if you want to pmsg me

23:03 <mithro> kc8apf: _florent_ has a method of updating the SPI flash through the PCIe interface using multiboot stuff

23:49 <ZirconiumX> mithro: reply sent